Issued Patents All Time
Showing 26–50 of 71 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8293578 | Hybrid bonding techniques for multi-layer semiconductor stacks | Gerald K. Bartley, Charles L. Johnson, Steven Paul VanderWiel | 2012-10-23 |
| 8284195 | Cooperative utilization of spatial indices between application and rendering hardware | Jeffrey Douglas Brown, Eric O. Mejdrich, Robert A. Shearer | 2012-10-09 |
| 8259130 | Color buffer contrast threshold for adaptive anti-aliasing | Jeffrey Douglas Brown, Eric O. Mejdrich | 2012-09-04 |
| 8259131 | Adaptive sub-sampling for reduction in issued rays | Jeffrey Douglas Brown, Eric O. Mejdrich | 2012-09-04 |
| 8248402 | Adaptive ray data reorder for optimized ray temporal locality | Jeffrey Douglas Brown, Eric O. Mejdrich | 2012-08-21 |
| 8214845 | Context switching in a network on chip by thread saving and restoring pointers to memory arrays containing valid message data | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2012-07-03 |
| 8195884 | Network on chip with caching restrictions for pages of computer memory | Eric O. Mejdrich | 2012-06-05 |
| 8139060 | Ray tracing image processing system | Jeffrey Douglas Brown, Eric O. Mejdrich | 2012-03-20 |
| 8127079 | Intelligent cache injection | Timothy H. Heil, Charles L. Johnson, Steven Paul VanderWiel | 2012-02-28 |
| 8085267 | Stochastic addition of rays in a ray tracing image processing system | Jeffrey Douglas Brown, Eric O. Mejdrich | 2011-12-27 |
| 8040799 | Network on chip with minimum guaranteed bandwidth for virtual communications channels | Kenneth M. Valk | 2011-10-18 |
| 8022950 | Stochastic culling of rays with increased depth of recursion | Jeffrey Douglas Brown, Eric O. Mejdrich | 2011-09-20 |
| 8020168 | Dynamic virtual software pipelining on a network on chip | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-09-13 |
| 8018466 | Graphics rendering on a network on chip | Jamie R. Kuesel, Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-09-13 |
| 8010750 | Network on chip that maintains cache coherency with invalidate commands | Miguel Comparan, Jamie R. Kuesel, Eric O. Mejdrich | 2011-08-30 |
| 7996621 | Data cache invalidate with data dependent expiration using a step value | Jeffrey Douglas Brown, Eric O. Mejdrich, Kenneth M. Valk | 2011-08-09 |
| 7958340 | Monitoring software pipeline performance on a network on chip | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-06-07 |
| 7940265 | Multiple spacial indexes for dynamic scene management in graphics rendering | Jeffrey Douglas Brown, Jamie R. Kuesel, Eric O. Mejdrich, Robert A. Shearer | 2011-05-10 |
| 7917703 | Network on chip that maintains cache coherency with invalidate commands | Miguel Comparan, Jamie R. Kuesel, Eric O. Mejdrich, Alfred T. Watson, III | 2011-03-29 |
| 7913010 | Network on chip with a low latency, high bandwidth application messaging interconnect | Jon K. Kriegel, Eric O. Mejdrich | 2011-03-22 |
| 7873701 | Network on chip with partitions | Eric O. Mejdrich, Paul E. Schardt, Robert A. Shearer | 2011-01-18 |
| 7852336 | Dynamic determination of optimal spatial index mapping to processor thread resources | Jeffrey Douglas Brown, Eric O. Mejdrich, Robert A. Shearer | 2010-12-14 |
| 7840757 | Method and apparatus for providing high speed memory for a processing unit | Bruce Beukema, Jon K. Kriegel, Jamie R. Kuesel, Eric O. Mejdrich, Robert A. Shearer +1 more | 2010-11-23 |
| 7836258 | Dynamic data cache invalidate with data dependent expiration | Jeffrey Douglas Brown, Eric O. Mejdrich | 2010-11-16 |
| 7818503 | Method and apparatus for memory utilization | Jon K. Kriegel, Eric O. Mejdrich, Robert A. Shearer | 2010-10-19 |