Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9817612 | High-performance hash joins using memory with extensive internal parallelism | Jeffrey H. Derby, Robert K. Montoye, Dheeraj Sreedhar, Steven Paul VanderWiel | 2017-11-14 |
| 9811287 | High-performance hash joins using memory with extensive internal parallelism | Jeffrey H. Derby, Robert K. Montoye, Dheeraj Sreedhar, Steven Paul VanderWiel | 2017-11-07 |
| 9495498 | Universal inter-layer interconnect for multi-layer semiconductor stacks | Gerald K. Bartley, Russell D. Hoover, Steven Paul VanderWiel, Patrick R. Varekamp | 2016-11-15 |
| 9245813 | Horizontally aligned graphite nanofibers in etched silicon wafer troughs for enhanced thermal performance | Gerald K. Bartley, John E. Kelly, III, Joseph Kuczynski, David R. Motschman, Arvind K. Sinha +2 more | 2016-01-26 |
| 9111899 | Horizontally and vertically aligned graphite nanofibers thermal interface material for use in chip stacks | Gerald K. Bartley, John E. Kelly, III, Joseph Kuczynski, David R. Motschman, Arvind K. Sinha +2 more | 2015-08-18 |
| 8736068 | Hybrid bonding techniques for multi-layer semiconductor stacks | Gerald K. Bartley, Russell D. Hoover, Steven Paul VanderWiel | 2014-05-27 |
| 8445918 | Thermal enhancement for multi-layer semiconductor stacks | Gerald K. Bartley, Russell D. Hoover, Steven Paul VanderWiel | 2013-05-21 |
| 8367478 | Method and system for internal layer-layer thermal enhancement | Gerald K. Bartley, John E. Kelly, III, David R. Motschman | 2013-02-05 |
| 8330489 | Universal inter-layer interconnect for multi-layer semiconductor stacks | Gerald K. Bartley, Russell D. Hoover, Steven Paul VanderWiel, Patrick R. Varekamp | 2012-12-11 |
| 8293578 | Hybrid bonding techniques for multi-layer semiconductor stacks | Gerald K. Bartley, Russell D. Hoover, Steven Paul VanderWiel | 2012-10-23 |
| 8140297 | Three dimensional chip fabrication | Gerald K. Bartley, Mark M. Thornton, Patrick R. Varekamp | 2012-03-20 |
| 8127079 | Intelligent cache injection | Timothy H. Heil, Russell D. Hoover, Steven Paul VanderWiel | 2012-02-28 |
| 6260164 | SRAM that can be clocked on either clock phase | Anthony Gus Aipperspach, Leland Leslie Day, Paul Allen Ganfield | 2001-07-10 |
| 5911063 | Method and apparatus for single phase clock distribution with minimal clock skew | David H. Allen | 1999-06-08 |
| 5815694 | Apparatus and method to change a processor clock frequency | Paul Allen Ganfield, James D. Strom | 1998-09-29 |
| 5790838 | Pipelined memory interface and method for using the same | John D. Irish, David J. Krolak, Sheldon B. Levenstein | 1998-08-04 |
| 5371764 | Method and apparatus for providing an uninterrupted clock signal in a data processing system | Ronald Dean Gillingham | 1994-12-06 |
| 5235521 | Reducing clock skew in large-scale integrated circuits | Robert F. Lembach, Bruce George Rudolph, Robert R. Williams | 1993-08-10 |
| 5077676 | Reducing clock skew in large-scale integrated circuits | Robert F. Lembach, Bruce George Rudolph, Robert R. Williams | 1991-12-31 |
| 4939389 | VLSI performance compensation for off-chip drivers and clock generation | Dennis Thomas Cox, David LeRoy Guertin, Bruce George Rudolph, Mark Turner, Robert R. Williams | 1990-07-03 |
| 4857765 | Noise control in an integrated circuit chip | Joseph J. Cahill, Steven D. Lewis, Timothy John Mullins, Bruce R. Petz | 1989-08-15 |
| 4495377 | Substrate wiring patterns for connecting to integrated-circuit chips | John Ryba | 1985-01-22 |