| 6426905 |
High speed DRAM local bit line sense amplifier |
Robert H. Dennard |
2002-07-30 |
| 5446312 |
Vertical-gate CMOS compatible lateral bipolar transistor |
Chang-Ming Hsieh, Louis L. Hsu, Shaw-Ning Mei, Lawrence F. Wagner, Jr. |
1995-08-29 |
| 5371022 |
Method of forming a novel vertical-gate CMOS compatible lateral bipolar transistor |
Chang-Ming Hsieh, Louis L. Hsu, Shaw-Ning Mei, Lawrence F. Wagner, Jr. |
1994-12-06 |
| 5341023 |
Novel vertical-gate CMOS compatible lateral bipolar transistor |
Chang-Ming Hsieh, Louis L. Hsu, Shaw-Ning Mei, Lawrence F. Wagner, Jr. |
1994-08-23 |
| 5194397 |
Method for controlling interfacial oxide at a polycrystalline/monocrystalline silicon interface |
Robert K. Cook, Subodh K. Kulkarni, Russell C. Lange, Paul A. Ronsheim, Seshadri Subbanna +2 more |
1993-03-16 |
| 4922455 |
Memory cell with active device for saturation capacitance discharge prior to writing |
William Chin, Rudolph D. Dussault, Friedrich-Christian Wernicke, Robert C. Wong |
1990-05-01 |
| 4651302 |
Read only memory including an isolation network connected between the array of memory cells and the output sense amplifier whereby reading speed is enhanced |
Richard Daniel Kimmel, Richard Levi |
1987-03-17 |
| 4462091 |
Word group redundancy scheme |
Peter Ludlow, Joseph Petrosky |
1984-07-24 |
| 4460984 |
Memory array with switchable upper and lower word lines |
— |
1984-07-17 |
| 4350991 |
Narrow channel length MOS field effect transistor with field protection region for reduced source-to-substrate capacitance |
William S. Johnson |
1982-09-21 |
