Issued Patents All Time
Showing 51–75 of 94 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8575698 | MOSFET with thin semiconductor channel and embedded stressor with enhanced junction isolation | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2013-11-05 |
| 8564040 | Inversion mode varactor | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz | 2013-10-22 |
| 8552487 | SOI trench DRAM structure with backside strap | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2013-10-08 |
| 8546228 | Strained thin body CMOS device having vertically raised source/drain stressors with single spacer | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2013-10-01 |
| 8546203 | Semiconductor structure having NFET extension last implants | Kangguo Cheng, Bruce B. Doris, Bala Haran, Nicolas Loubet, Amlan Majumdar +1 more | 2013-10-01 |
| 8536032 | Formation of embedded stressor through ion implantation | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Ghavam G. Shahidi | 2013-09-17 |
| 8530974 | CMOS structure having multiple threshold voltage devices | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2013-09-10 |
| 8525292 | SOI device with DTI and STI | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2013-09-03 |
| 8492839 | Same-chip multicharacteristic semiconductor structures | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2013-07-23 |
| 8492854 | Integrated circuit having raised source drains devices with reduced silicide contact resistance and methods to fabricate same | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Christian Lavoie | 2013-07-23 |
| 8486776 | Strained devices, methods of manufacture and design structures | Stephen W. Bedell, Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Katherine L. Saenger | 2013-07-16 |
| 8482078 | Integrated circuit diode | Kangguo Cheng, Ali Khakifirooz, Ghavam G. Shahidi | 2013-07-09 |
| 8470678 | Tensile stress enhancement of nitride film for stressed channel field effect transistor fabrication | Ming Cai, Dechao Guo, Chun-Chen Yeh | 2013-06-25 |
| 8455932 | Local interconnect structure self-aligned to gate structure | Ali Khakifirooz, Kangguo Cheng, Bruce B. Doris, Wilfried E. Haensch, Balasubramanian S. Haran | 2013-06-04 |
| 8455308 | Fully-depleted SON | Kangguo Cheng, Bruce B. Doris, Ghavam G. Shahidi | 2013-06-04 |
| 8450807 | MOSFETs with reduced contact resistance | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz | 2013-05-28 |
| 8445356 | Integrated circuit having back gating, improved isolation and reduced well resistance and method to fabricate same | Jin Cai, Kangguo Cheng, Ali Khakifirooz | 2013-05-21 |
| 8445345 | CMOS structure having multiple threshold voltage devices | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2013-05-21 |
| 8435846 | Semiconductor devices with raised extensions | Kangguo Cheng, Bruce B. Doris, Balasubramanian S. Haran, Ali Khakifirooz | 2013-05-07 |
| 8435845 | Junction field effect transistor with an epitaxially grown gate structure | Tak H. Ning, Kangguo Cheng, Ali Khakifirooz | 2013-05-07 |
| 8421159 | Raised source/drain field effect transistor | Bruce B. Doris, Kangguo Cheng, Ali Khakifirooz | 2013-04-16 |
| 8421156 | FET with self-aligned back gate | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz | 2013-04-16 |
| 8421132 | Post-planarization UV curing of stress inducing layers in replacement gate transistor fabrication | Ming Cai, Dechao Guo, Chun-Chen Yeh | 2013-04-16 |
| 8404540 | Device and method of reducing junction leakage | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Ghavam G. Shahidi | 2013-03-26 |
| 8399938 | Stressed Fin-FET devices with low contact resistance | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Ghavam G. Shahidi | 2013-03-19 |