Issued Patents All Time
Showing 126–150 of 151 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8248401 | Accelerated data structure optimization based upon view orientation | David Keith Fowler, Eric O. Mejdrich, Robert A. Shearer | 2012-08-21 |
| 8248412 | Physical rendering with textured bounding volume primitive mapping | David Keith Fowler, Eric O. Mejdrich, Robert A. Shearer | 2012-08-21 |
| 8248415 | User-defined non-visible geometry featuring ray filtering | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2012-08-21 |
| 8248422 | Efficient texture processing of pixel groups with SIMD execution unit | Eric O. Mejdrich, Robert A. Shearer | 2012-08-21 |
| 8243073 | Tree insertion depth adjustment based on view frustum and distance culling | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2012-08-14 |
| 8214845 | Context switching in a network on chip by thread saving and restoring pointers to memory arrays containing valid message data | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2012-07-03 |
| 8140832 | Single step mode in a software pipeline within a highly threaded network on a chip microprocessor | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2012-03-20 |
| 8108908 | Security methodology to prevent user from compromising throughput in a highly threaded network on a chip processor | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2012-01-31 |
| 8102391 | Hybrid rendering of image data utilizing streaming geometry frontend interconnected to physical rendering backend through dynamic accelerated data structure generator | Dave Fowler, Eric O. Mejdrich, Robert A. Shearer | 2012-01-24 |
| 8078850 | Branch prediction technique using instruction for resetting result table pointer | Jamie R. Kuesel, Mark G. Kupferschmidt, Eric O. Mejdrich | 2011-12-13 |
| 8024616 | Pseudo random process state register for fast random process test generation | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2011-09-20 |
| 8018466 | Graphics rendering on a network on chip | Russell D. Hoover, Jamie R. Kuesel, Eric O. Mejdrich, Robert A. Shearer | 2011-09-13 |
| 8020168 | Dynamic virtual software pipelining on a network on chip | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2011-09-13 |
| 7992043 | Software debugger for packets in a network on a chip | Eric O. Mejdrich, Robert A. Shearer, Matthew R. Tubbs | 2011-08-02 |
| 7991978 | Network on chip with low latency, high bandwidth application messaging interconnects that abstract hardware inter-thread data communications into an architected state of a processor | Jamie R. Kuesel, Mark G. Kupferschmidt, Eric O. Mejdrich | 2011-08-02 |
| 7973804 | Image processing with highly threaded texture fragment generation | Eric O. Mejdrich, Robert A. Shearer | 2011-07-05 |
| 7958340 | Monitoring software pipeline performance on a network on chip | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2011-06-07 |
| 7937589 | Computer grid access management system | William A. Oswald, Janice Lynn Pascoe, Lance G. Thompson | 2011-05-03 |
| 7873701 | Network on chip with partitions | Russell D. Hoover, Eric O. Mejdrich, Robert A. Shearer | 2011-01-18 |
| 7747414 | Run-Time performance verification system | Thomas M. Armstead, Lance R. Meyer, Robert A. Shearer | 2010-06-29 |
| 7719532 | Efficient and flexible data organization for acceleration data structure nodes | Robert A. Shearer | 2010-05-18 |
| 7533011 | Simulating and verifying signal glitching | Thomas M. Armstead, Gregory Albert Dancker | 2009-05-12 |
| 7523367 | Method and apparatus to verify non-deterministic results in an efficient random manner | Gerald G. Fagerness, Terry J. Opie, David E. Wood | 2009-04-21 |
| 7523317 | Computer grid access management system | William A. Oswald, Janice Lynn Pascoe, Lance G. Thompson | 2009-04-21 |
| 7428483 | Method and apparatus to simulate and verify signal glitching | Thomas M. Armstead, Gregory Albert Dancker | 2008-09-23 |