MK

Mark G. Kupferschmidt

IBM: 24 patents #4,429 of 70,183Top 7%
Microsoft: 4 patents #10,696 of 40,388Top 30%
Overall (All Time): #135,846 of 4,157,543Top 4%
28
Patents All Time

Issued Patents All Time

Showing 25 most recent of 28 patents

Patent #TitleCo-InventorsDate
11877522 Determining critical timing paths in a superconducting circuit design Janet L. Schneider, Paul Accisano, Kenneth Reneris 2024-01-16
11380835 Determining critical timing paths in a superconducting circuit design Janet L. Schneider, Paul Accisano, Kenneth Reneris 2022-07-05
11269690 Dynamic thread status retrieval using inter-thread communication Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2022-03-08
11068318 Dynamic thread status retrieval using inter-thread communication Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2021-07-20
11030369 Superconducting circuit with virtual timing elements and related methods Janet L. Schneider, Kenneth Reneris, Brian Lee Koehler, Adam J. Muff, Alexander Braun +1 more 2021-06-08
10769344 Determining timing paths and reconciling topology in a superconducting circuit design Janet L. Schneider, Paul Accisano, Kenneth Reneris 2020-09-08
10545797 Dynamic thread status retrieval using inter-thread communication Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2020-01-28
10534654 Dynamic thread status retrieval using inter-thread communication Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2020-01-14
9606841 Thread scheduling across heterogeneous processing elements with resource mapping Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2017-03-28
9600346 Thread scheduling across heterogeneous processing elements with resource mapping Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2017-03-21
9256574 Dynamic thread status retrieval using inter-thread communication Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2016-02-09
9256573 Dynamic thread status retrieval using inter-thread communication Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2016-02-09
9244840 Cache swizzle with inline transposition Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2016-01-26
9239791 Cache swizzle with inline transposition Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2016-01-19
9195443 Providing performance tuned versions of compiled code to a CPU in a system of heterogeneous cores Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2015-11-24
9176885 Combined cache inject and lock operation Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2015-11-03
9134778 Power distribution management in a system on a chip Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2015-09-15
9134779 Power distribution management in a system on a chip Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2015-09-15
9043801 Two-tiered dynamic load balancing using sets of distributed thread pools Paul E. Schardt, Robert A. Shearer 2015-05-26
8990833 Indirect inter-thread communication using a shared pool of inboxes Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2015-03-24
8826299 Spawned message state determination Jon K. Kriegel, Paul E. Schardt 2014-09-02
8776035 Providing performance tuned versions of compiled code to a CPU in a system of heterogeneous cores Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2014-07-08
8719404 Regular expression searches utilizing general purpose processors on a network interconnect Jamie R. Kuesel, Paul E. Schardt, Robert A. Shearer 2014-05-06
8640230 Inter-thread communication with software security Jason Greenwood, Paul E. Schardt, Robert A. Shearer 2014-01-28
8560897 Hard memory array failure recovery utilizing locking structure Miguel Comparan, Robert A. Shearer 2013-10-15