Issued Patents All Time
Showing 151–157 of 157 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8004884 | Iterative write pausing techniques to improve read latency of memory systems | Michele M. Franceschini, Moinuddin K. Qureshi, Vijayalakshmi Srinivasan | 2011-08-23 |
| 7984329 | System and method for providing DRAM device-level repair via address remappings external to the device | Darren L. Anand, Jeffrey H. Dreibelbis, Charles A. Kilmer, Warren E. Maule, Robert B. Tremaine | 2011-07-19 |
| 7962700 | Systems and methods for reducing latency for accessing compressed memory using stratified compressed memory architectures and organization | Peter A. Franaszek, Robert B. Tremaine | 2011-06-14 |
| 7949931 | Systems and methods for error detection in a memory system | — | 2011-05-24 |
| 7895502 | Error control coding methods for memories with subline accesses | Junsheng Han, Michael R. Trombley | 2011-02-22 |
| 7721140 | Systems and methods for improving serviceability of a memory system | Timothy J. Dell | 2010-05-18 |
| 7471219 | Low latency constrained coding for parallel busses | — | 2008-12-30 |