LI

Leonard O. Farnsworth, III

IBM: 3 patents #26,272 of 70,183Top 40%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
📍 Middlebury, VT: #13 of 87 inventorsTop 15%
🗺 Vermont: #1,417 of 4,968 inventorsTop 30%
Overall (All Time): #1,246,189 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
7478301 Partial good integrated circuit and method of testing same Michael Z. Felske, Pamela S. Gillis, Benjamin P. Lynch, Michael R. Ouellette, Thomas St. Pierre +2 more 2009-01-13
7434129 Partial good integrated circuit and method of testing same Michael Z. Felske, Pamela S. Gillia, Benjamin P. Lynch, Michael R. Ouellette, Thomas St. Pierre +2 more 2008-10-07
7305600 Partial good integrated circuit and method of testing same Michael Z. Felske, Pamela S. Gillis, Benjamin P. Lynch, Michael R. Ouellette, Thomas St.Pierre +2 more 2007-12-04
7103816 Method and system for reducing test data volume in the testing of logic products Frank Distler, Andrew Ferko, Brion Keller, Bernd Koenemann, Donald L. Wheater 2006-09-05