Issued Patents All Time
Showing 101–125 of 190 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8780578 | Integrated circuit die stacks having initially identical dies personalized with switches | Jimmy G. Foster, Sr. | 2014-07-15 |
| 8756475 | Method of detecting error in a semiconductor memory device | Hoe-Ju Chung | 2014-06-17 |
| 8718216 | Digital phase detector with zero phase offset | Daniel M. Dreps, Glen A. Wiedemeier | 2014-05-06 |
| 8697567 | Implementing decoupling devices inside a TSV DRAM stack | Joab D. Henderson, Warren E. Maule, Kenneth L. Wright | 2014-04-15 |
| 8659959 | Advanced memory device having improved performance, reduced power and increased reliability | George Liang-Tai Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter +2 more | 2014-02-25 |
| 8644085 | Duty cycle distortion correction | Paul Rudrud, Jacob Sloat | 2014-02-04 |
| 8639874 | Power management of a spare DRAM on a buffered DIMM by issuing a power on/off command to the DRAM device | Warren E. Maule, Kevin C. Gower, Dustin J. VanStee | 2014-01-28 |
| 8635487 | Memory interface having extended strobe burst for write timing calibration | Kevin C. Gower | 2014-01-21 |
| 8543753 | Multi-use physical architecture | Daniel M. Dreps, Michael A. Sorna, Glen A. Wiedemeier | 2013-09-24 |
| 8516409 | Implementing vertical die stacking to distribute logical function over multiple dies in through-silicon-via stacked semiconductor device | Paul W. Coteus, Robert B. Tremaine | 2013-08-20 |
| 8493801 | Strobe offset in bidirectional memory strobe configurations | Daniel M. Dreps, Kevin C. Gower, Michael K. Kerr, David W. Mann, James A. Mossman +3 more | 2013-07-23 |
| 8452919 | Advanced memory device having improved performance, reduced power and increased reliability | George Liang-Tai Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter +2 more | 2013-05-28 |
| 8432027 | Integrated circuit die stacks with rotationally symmetric vias | Jimmy G. Foster, Sr. | 2013-04-30 |
| 8379459 | Memory system with delay locked loop (DLL) bypass control | Kevin C. Gower, Warren E. Maule | 2013-02-19 |
| 8359521 | Providing a memory device having a shared error feedback pin | Paul W. Coteus, Timothy J. Dell | 2013-01-22 |
| 8343804 | Implementing multiple different types of dies for memory stacking | Paul W. Coteus | 2013-01-01 |
| 8315068 | Integrated circuit die stacks having initially identical dies personalized with fuses and methods of manufacturing the same | Jimmy G. Foster, Sr. | 2012-11-20 |
| 8310841 | Integrated circuit die stacks having initially identical dies personalized with switches and methods of making the same | Jimmy G. Foster, Sr. | 2012-11-13 |
| 8307270 | Advanced memory device having improved performance, reduced power and increased reliability | George Liang-Tai Chiu, Paul W. Coteus, Daniel M. Dreps, Kevin C. Gower, Hillery C. Hunter +2 more | 2012-11-06 |
| 8289798 | Voltage regulator bypass in memory device | Paul W. Coteus, Kevin C. Gower | 2012-10-16 |
| 8284621 | Strobe offset in bidirectional memory strobe configurations | Daniel M. Dreps, Kevin C. Gower, Michael K. Kerr, David W. Mann, James A. Mossman +3 more | 2012-10-09 |
| 8258619 | Integrated circuit die stacks with translationally compatible vias | Jimmy G. Foster, Sr. | 2012-09-04 |
| 8253478 | Internal voltage generating circuit for semiconductor device | Jin-Kyoung Jung, Jung-Bae Lee | 2012-08-28 |
| 8255783 | Apparatus, system and method for providing error protection for data-masking bits | — | 2012-08-28 |
| 8093075 | Semiconductor integrated circuit including a power supply, semiconductor system including a semiconductor integrated circuit, and method of forming a semiconductor integrated circuit | Chang Hyun Kim | 2012-01-10 |