| 7491588 |
Method and structure for buried circuits and devices |
John E. Campbell, William T. Devine |
2009-02-17 |
| 7320918 |
Method and structure for buried circuits and devices |
John E. Campbell, William T. Devine |
2008-01-22 |
| 7141853 |
Method and structure for buried circuits and devices |
John E. Campbell, William T. Devine |
2006-11-28 |
| 6759282 |
Method and structure for buried circuits and devices |
John E. Campbell, William T. Devine |
2004-07-06 |
| 6326285 |
Simultaneous multiple silicon on insulator (SOI) wafer production |
Alex A. Behfar |
2001-12-04 |
| 5920764 |
Process for restoring rejected wafers in line for reuse as new |
David R. Hanson, Hance H. Huston, III |
1999-07-06 |
| 5897370 |
High aspect ratio low resistivity lines/vias by surface diffusion |
Rajiv V. Joshi, Manu Jamnadas Tejwani |
1999-04-27 |
| 5882987 |
Smart-cut process for the production of thin semiconductor material films |
— |
1999-03-16 |
| 5877084 |
Method for fabricating high aspect ratio low resistivity lines/vias by surface reaction |
Rajiv V. Joshi, Manu Jamnadas Tejwani |
1999-03-02 |
| 5856026 |
High aspect ratio low resistivity lines/vias by surface diffusion |
Rajiv V. Joshi, Manu J. Tejwani |
1999-01-05 |
| 5787098 |
Complete chip I/O test through low contact testing using enhanced boundary scan |
Sumit DasGupta, Ronald Gene Walther |
1998-07-28 |
| 5731245 |
High aspect ratio low resistivity lines/vias with a tungsten-germanium alloy hard cap |
Rajiv V. Joshi, Manu Jamnadas Tejwani |
1998-03-24 |
| 5485032 |
Antifuse element with electrical or optical programming |
Dominic J. Schepis, Seshadri Subbanna, Manu J. Tejwani |
1996-01-16 |
| 5469981 |
Electrically blowable fuse structure manufacturing for organic insulators |
James F. White, Jer-Ming Yang |
1995-11-28 |
| 5420069 |
Method of making corrosion resistant, low resistivity copper for interconnect metal lines |
Rajiv V. Joshi, Manu Jamnadas Tejwani |
1995-05-30 |
| 5389814 |
Electrically blowable fuse structure for organic insulators |
James F. White, Jer-Ming Yang |
1995-02-14 |
| 5372652 |
Aerosol cleaning method |
Jin J. Wu |
1994-12-13 |
| 5371047 |
Chip interconnection having a breathable etch stop layer |
Stephen E. Greco |
1994-12-06 |
| 5314840 |
Method for forming an antifuse element with electrical or optical programming |
Dominic J. Schepis, Seshardi Subbanna, Manu J. Tijwani |
1994-05-24 |
| 4839715 |
Chip contacts without oxide discontinuities |
Joseph J. Gajda, Paul A. Totta, Francis G. Trudeau |
1989-06-13 |
| 4622205 |
Electromigration lifetime increase of lead base alloys |
David P. Fouts, Devandra Gupta, Paul S. Ho, Jasvir Singh Jaspal, James Lloyd +2 more |
1986-11-11 |
| 4493856 |
Selective coating of metallurgical features of a dielectric substrate with diverse metals |
Ananda H. Kumar |
1985-01-15 |
| 4471405 |
Thin film capacitor with a dual bottom electrode structure |
James K. Howard |
1984-09-11 |
| 4423087 |
Thin film capacitor with a dual bottom electrode structure |
James K. Howard |
1983-12-27 |
