Issued Patents All Time
Showing 76–100 of 151 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8895436 | Implementing enhanced power supply distribution and decoupling utilizing TSV exclusion zone | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2014-11-25 |
| 8890083 | Soft error detection | Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2014-11-18 |
| 8866306 | Signal path and method of manufacturing a multiple-patterned semiconductor device | David H. Allen, Douglas M. Dewanz, David P. Paulsen | 2014-10-21 |
| 8823090 | Field-effect transistor and method of creating same | Gerald K. Bartley, Darryl J. Becker, Philip Raymond Germann, Andrew Benson Maki | 2014-09-02 |
| 8816470 | Independently voltage controlled volume of silicon on a silicon on insulator chip | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2014-08-26 |
| 8809156 | Method for implementing deep trench enabled high current capable bipolar transistor for current switching and output driver applications | David H. Allen, Douglas M. Dewanz, David P. Paulsen | 2014-08-19 |
| 8754499 | Semiconductor chip with power gating through silicon vias | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2014-06-17 |
| 8754417 | Vertical stacking of field effect transistor structures for logic gates | Todd A. Christensen, Phil C. Paone, David P. Paulsen | 2014-06-17 |
| 8735975 | Implementing semiconductor soc with metal via gate node high performance stacked transistors | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2014-05-27 |
| 8642456 | Implementing semiconductor signal-capable capacitors with deep trench and TSV technologies | Gerald K. Bartley, Philip Raymond Germann | 2014-02-04 |
| 8617939 | Enhanced thin film field effect transistor integration into back end of line | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2013-12-31 |
| 8592921 | Deep trench embedded gate transistor | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Ulmann, Kelly L. Williams | 2013-11-26 |
| 8575613 | Implementing vertical signal repeater transistors utilizing wire vias as gate nodes | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2013-11-05 |
| 8574982 | Implementing eDRAM stacked FET structure | Karl R. Erickson, David P. Paulsen, Kelly L. Williams | 2013-11-05 |
| 8571847 | Efficiency of static core turn-off in a system-on-a-chip with variation | Chen-Yong Cher, Paul W. Coteus, Alan Gara, Eren Kursun, David P. Paulsen +2 more | 2013-10-29 |
| 8549363 | Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components | Chen-Yong Cher, Paul W. Coteus, Alan Gara, Eren Kursun, David P. Paulsen +2 more | 2013-10-01 |
| 8535393 | Method and apparatus for measurement and control of photomask to substrate alignment | Axel Aguado Granados, Benjamin A. Fox, Nathaniel J. Gibbs, Andrew Benson Maki, Trevor Joseph Timpane | 2013-09-17 |
| 8536587 | Method and apparatus for measurement and control of photomask to substrate alignment | Axel Aguado Granados, Benjamin A. Fox, Nathaniel J. Gibbs, Andrew Benson Maki, Trevor Joseph Timpane | 2013-09-17 |
| 8536632 | FinFET with reduced gate to fin overlay sensitivity | Kangguo Cheng, Louis L. Hsu, Jack A. Mandelman | 2013-09-17 |
| 8539425 | Utilizing gate phases for circuit tuning | Karl Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2013-09-17 |
| 8525245 | eDRAM having dynamic retention and performance tradeoff | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Gregory J. Uhlmann, Kelly L. Williams | 2013-09-03 |
| 8518767 | FinFET with reduced gate to fin overlay sensitivity | Kangguo Cheng, Louis L. Hsu, Jack A. Mandelman | 2013-08-27 |
| 8513815 | Implementing integrated circuit mixed double density and high performance wire structure | Anthony Gus Aipperspach, Todd A. Christensen | 2013-08-20 |
| 8492220 | Vertically stacked FETs with series bipolar junction transistor | Karl R. Erickson, Phil C. Paone, David P. Paulsen, Kelly L. Williams | 2013-07-23 |
| 8492903 | Through silicon via direct FET signal gating | Gerald K. Bartley, Philip Raymond Germann, David P. Paulsen | 2013-07-23 |