PG

Philip Raymond Germann

IBM: 86 patents #750 of 70,183Top 2%
Overall (All Time): #19,741 of 4,157,543Top 1%
86
Patents All Time

Issued Patents All Time

Showing 25 most recent of 86 patents

Patent #TitleCo-InventorsDate
9739825 Residual material detection in backdrilled stubs Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson 2017-08-22
9612988 Donor cores to improve integrated circuit yield Gerald K. Bartley, Darryl J. Becker, William Paul Hovis 2017-04-04
9488690 Residual material detection in backdrilled stubs Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson 2016-11-08
9341670 Residual material detection in backdrilled stubs Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark O. Maxson 2016-05-17
9312199 Intelligent chip placement within a three-dimensional chip stack Gerald K. Bartley, Darryl J. Becker, William Paul Hovis 2016-04-12
9281261 Intelligent chip placement within a three-dimensional chip stack Gerald K. Bartley, Darryl J. Becker, William Paul Hovis 2016-03-08
9207275 Interconnect solder bumps for die testing Gerald K. Bartley, William Paul Hovis 2015-12-08
9003559 Continuity check monitoring for microchip exploitation detection Gerald K. Bartley, Darryl J. Becker, Paul Eric Dahlen, Andrew Benson Maki, Mark O. Maxson +1 more 2015-04-07
8823090 Field-effect transistor and method of creating same Gerald K. Bartley, Darryl J. Becker, Andrew Benson Maki, John E. Sheets, II 2014-09-02
8796578 Implementing selective rework for chip stacks and silicon carrier assemblies Gerald K. Bartley, Darryl J. Becker, Andrew Benson Maki 2014-08-05
8788748 Implementing memory interface with configurable bandwidth Gerald K. Bartley, John Michael Borkenhagen 2014-07-22
8642456 Implementing semiconductor signal-capable capacitors with deep trench and TSV technologies Gerald K. Bartley, John E. Sheets, II 2014-02-04
8639879 Sorting movable memory hierarchies in a computer system Gerald K. Bartley, John Michael Borkenhagen, William Paul Hovis 2014-01-28
8519304 Implementing selective rework for chip stacks and silicon carrier assemblies Gerald K. Bartley, Darryl J. Becker, Andrew Benson Maki 2013-08-27
8491739 Implementing interleaved-dielectric joining of multi-layer laminates Mark J. Jeanson 2013-07-23
8492903 Through silicon via direct FET signal gating Gerald K. Bartley, David P. Paulsen, John E. Sheets, II 2013-07-23
8466024 Power domain controller with gated through silicon via having FET with horizontal channel Gerald K. Bartley, Darryl J. Becker, Andrew Benson Maki, John E. Sheets, II 2013-06-18
8332659 Signal quality monitoring to defeat microchip exploitation Gerald K. Bartley, Darryl J. Becker, Paul Eric Dahlen, Andrew Benson Maki, Mark O. Maxson 2012-12-11
8255628 Structure for multi-level memory architecture with data prioritization Gerald K. Bartley, John Michael Borkenhagen, William Paul Hovis 2012-08-28
8214657 Resistance sensing for defeating microchip exploitation Gerald K. Bartley, Darryl J. Becker, Paul Eric Dahlen, Andrew Benson Maki, Mark O. Maxson +1 more 2012-07-03
8174103 Enhanced architectural interconnect options enabled with flipped die on a multi-chip package Gerald K. Bartley, Darryl J. Becker, Paul Eric Dahlen, Andrew Benson Maki, Mark O. Maxson 2012-05-08
8172140 Doped implant monitoring for microchip tamper detection Gerald K. Bartley, Darryl J. Becker, Todd A. Christensen, Paul Eric Dahlen, Andrew Benson Maki +2 more 2012-05-08
8108647 Digital data architecture employing redundant links in a daisy chain of component modules Gerald K. Bartley, Darryl J. Becker, John Michael Borkenhagen, William Paul Hovis, Mark O. Maxson 2012-01-31
8079134 Method of enhancing on-chip inductance structure utilizing silicon through via technology Andrew Benson Maki, Gerald K. Bartley, Mark O. Maxson, Darryl J. Becker, Paul Eric Dahlen +1 more 2011-12-20
8037258 Structure for dual-mode memory chip for high capacity memory subsystem Gerald K. Bartley, John Michael Borkenhagen 2011-10-11