Issued Patents All Time
Showing 51–75 of 94 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6944088 | Apparatus and method for generating memory access signals, and memory accessed using said signals | Toru Asano, Sang Hoo Dhong, Osamu Takahashi | 2005-09-13 |
| 6941335 | Random carry-in for floating-point operations | Sang Hoo Dhong, Harm Peter Hofstee, Kevin John Nowka, Steven Douglas Posluszny | 2005-09-06 |
| 6927615 | Low skew, power efficient local clock signal generation system | Sang Hoo Dhong, Osamu Takahashi, James D. Warnock, Dieter Wendel | 2005-08-09 |
| 6914453 | Integrated logic and latch design with clock gating at static input signals | Sang Hoo Dhong, Hwa-Joon Oh, Naoka Yano | 2005-07-05 |
| 6825695 | Unified local clock buffer structures | Sang Hoo Dhong, Osamu Takahashi, James D. Warnock, Dieter Wendel | 2004-11-30 |
| 6816396 | Apparatus for detecting multiple hits in a CAMRAM memory array | Chiaming Chai, Jeffrey Herbert Fischer, Michael ThaiThanh Phan | 2004-11-09 |
| 6744282 | Latching dynamic logic structure, and integrated circuit including same | Sang Hoo Dhong, Osamu Takahashi, James D. Warnock, Dieter Wendel | 2004-06-01 |
| 6604191 | Method and apparatus for accelerating instruction fetching for a processor | Brian King Flacks, David Meltzer | 2003-08-05 |
| 6600959 | Method and apparatus for implementing microprocessor control logic using dynamic programmable logic arrays | Paula Kristine Coulman, Sang Hoo Dhong, Brian Flachs, Harm Peter Hofstee, Jaehong Park +2 more | 2003-07-29 |
| 6574698 | Method and system for accessing a cache memory within a data processing system | Sang Hoo Dhong | 2003-06-03 |
| 6535041 | Strobe circuit keeper arrangement providing reduced power consumption | Robert J. Bucki, Sang Hoo Dhong, Jeffrey Herbert Fischer, Osamu Takahashi | 2003-03-18 |
| 6502224 | Method and apparatus for synthesizing levelized logic | Sang Hoo Dhong, Harm Peter Hofstee, Stephen Douglas Posluszny, Osamu Takahashi, Dieter Wendel | 2002-12-31 |
| 6453390 | Processor cycle time independent pipeline cache and method for pipelining data from a cache | Naoaki Aoki, Sang Hoo Dhong, Nobuo Kojima | 2002-09-17 |
| 6453258 | Optimized burn-in for fixed time dynamic logic circuitry | Naoaki Aoki, Sang Hoo Dhong, Osamu Takahashi | 2002-09-17 |
| 6421699 | Method and system for a speedup of a bit multiplier | Sang Hoo Dhong, Perng Shyong Lin | 2002-07-16 |
| 6393446 | 32-bit and 64-bit dual mode rotator | Sang Hoo Dhong, Hung C. Ngo, Jaehong Park | 2002-05-21 |
| 6356990 | Set-associative cache memory having a built-in set prediction array | Naoaki Aoki, Sang Hoo Dhong, Nobuo Kojima | 2002-03-12 |
| 6334184 | Processor and method of fetching an instruction that select one of a plurality of decoded fetch addresses generated in parallel to form a memory request | Sang Hoo Dhong | 2001-12-25 |
| 6239620 | Method and apparatus for generating true/complement signals | Naoaki Aoki, Sang Hoo Dhong, Nobuo Kojima | 2001-05-29 |
| 6232798 | Self-resetting circuit timing correction | Paula Kristine Coulman, Sang Hoo Dhong, Osamu Takahashi | 2001-05-15 |
| 6229358 | Delayed matching signal generator and frequency multiplier using scaled delay networks | David William Boerstler | 2001-05-08 |
| 6229338 | Method and apparatus for reducing dynamic programmable logic array propagation delay | Paula Kristine Coulman, Sang Hoo Dhong, Osamu Takahashi | 2001-05-08 |
| 6226731 | Method and system for accessing a cache memory within a data-processing system utilizing a pre-calculated comparison array | Sang Hoo Dhong | 2001-05-01 |
| 6212619 | System and method for high-speed register renaming by counting | Sang Hoo Dhong, Harm Peter Hofstee, Kevin John Nowka | 2001-04-03 |
| 6161164 | Content addressable memory accessed by the sum of two operands | Sang Hoo Dhong | 2000-12-12 |