NY

Naoka Yano

KT Kabushiki Kaisha Toshiba: 6 patents #4,898 of 21,451Top 25%
IBM: 1 patents #44,794 of 70,183Top 65%
📍 Tokyo, TX: #62 of 78 inventorsTop 80%
Overall (All Time): #756,633 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
6914453 Integrated logic and latch design with clock gating at static input signals Sang Hoo Dhong, Hwa-Joon Oh, Joel A. Silberman 2005-07-05
6519621 Arithmetic circuit for accumulative operation 2003-02-11
6477557 Division circuit not requiring taking complements of divisor, dividend and remainder 2002-11-05
6286024 High-efficiency multiplier and multiplying method Naoyuki Tamura 2001-09-04
6047305 Division circuit not requiring taking complements of divisor, dividend and remainder 2000-04-04
5977808 Latch circuit and arithmetic unit having the same Hiroaki Murakami, Yukinori Muroya 1999-11-02
5675527 Multiplication device and sum of products calculation device 1997-10-07