Issued Patents All Time
Showing 176–200 of 472 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8935513 | Processor performance improvement for instruction sequences that include barrier instructions | William J. Starke, Derek E. Williams | 2015-01-13 |
| 8930629 | Data cache block deallocate requests in a multi-level cache hierarchy | Sanjeev Ghai, William J. Starke, Jeff A. Stuecheli, Derek E. Williams, Phillip G. Williams | 2015-01-06 |
| 8910125 | Monitoring software performance | Randall Ray Heisch, Venkat R. Indukuru, Aaron C. Sawdey | 2014-12-09 |
| 8893126 | Binding a process to a special purpose processing element having characteristics of a processor | Lakshminarayana B. Arimilli, Ravi Kumar Arimilli, Charles F. Marino, William J. Starke | 2014-11-18 |
| 8874852 | Data cache block deallocate requests in a multi-level cache hierarchy | Sanjeev Ghai, William J. Starke, Jeff A. Stuecheli, Derek E. Williams, Phillip G. Williams | 2014-10-28 |
| 8856455 | Data cache block deallocate requests | Sanjeev Ghai, William J. Starke, Jeff A. Stuecheli, Derek E. Williams, Phillip G. Williams | 2014-10-07 |
| 8806148 | Forward progress mechanism for stores in the presence of load contention in a system favoring loads by state alteration | Hien Minh Le, Hugh Shen, Jeff A. Stuecheli, Derek E. Williams | 2014-08-12 |
| 8799589 | Forward progress mechanism for stores in the presence of load contention in a system favoring loads | Hien Minh Le, Jeff A. Stuecheli, Derek E. Williams | 2014-08-05 |
| 8799588 | Forward progress mechanism for stores in the presence of load contention in a system favoring loads by state alteration | Hien Minh Le, Hugh Shen, Jeff A. Stuecheli, Derek E. Williams | 2014-08-05 |
| 8793442 | Forward progress mechanism for stores in the presence of load contention in a system favoring loads | Hien Minh Le, Jeff A. Stuecheli, Derek E. Williams | 2014-07-29 |
| 8683140 | Cache-based speculation of stores following synchronizing operations | William J. Starke, Derek E. Williams | 2014-03-25 |
| 8683160 | Method and apparatus for supporting memory usage accounting | Karthick Rajamani, Gregory S. Still, Jeffrey A. Stuecheli, Malcolm S. Ware | 2014-03-25 |
| 8656128 | Aggregate data processing system having multiple overlapping synthetic computers | Charles F. Marino, William J. Starke, Derek E. Williams | 2014-02-18 |
| 8656121 | Facilitating data coherency using in-memory tag bits and tag test instructions | Geraint North, William J. Starke, Derek E. Williams | 2014-02-18 |
| 8650367 | Method and apparatus for supporting memory usage throttling | Michael Stephen Floyd, Karthick Rajamani, Gregory A. Still, Jeffrey A. Stuecheli, Malcolm S. Ware | 2014-02-11 |
| 8645640 | Method and apparatus for supporting memory usage throttling | Michael Stephen Floyd, Karthick Rajamani, Gregory S. Still, Jeffrey A. Stuecheli, Malcolm S. Ware | 2014-02-04 |
| 8645633 | Facilitating data coherency using in-memory tag bits and faulting stores | Geraint North, William J. Starke, Derek E. Williams | 2014-02-04 |
| 8645644 | Facilitating data coherency using in-memory tag bits and tag test instructions | Geraint North, William J. Starke, Derek E. Williams | 2014-02-04 |
| 8521982 | Load request scheduling in a cache hierarchy | Robert Alan Cargnoni, Thomas L. Jeremiah, Stephen J. Powell, William J. Starke, Jeffrey A. Steucheli | 2013-08-27 |
| 8510512 | Memory coherence directory supporting remotely sourced requests of nodal scope | Paul Allen Ganfield, David J. Krolak, Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli +1 more | 2013-08-13 |
| 8504779 | Memory coherence directory supporting remotely sourced requests of nodal scope | Paul Allen Ganfield, David J. Krolak, Michael S. Siegel, William J. Starke, Jeffrey A. Stuecheli +1 more | 2013-08-06 |
| 8499124 | Handling castout cache lines in a victim cache | Alvan W. Ng, Michael S. Siegel, William J. Starke, Derek E. Williams, Phillip G. Williams | 2013-07-30 |
| 8495308 | Processor, data processing system and method supporting a shared global coherency state | William J. Starke, Derek E. Williams, Phillip G. Williams | 2013-07-23 |
| 8489819 | Victim cache lateral castout targeting | Michael S. Siegel, William J. Starke, Derek E. Williams | 2013-07-16 |
| 8433851 | Reducing wiring congestion in a cache subsystem utilizing sectored caches with discontiguous addressing | Leo James Clark, James Stephen Fields, Jr., William J. Starke, Derek E. Williams, Phillip G. Williams | 2013-04-30 |