GD

Gary S. Ditlow

IBM: 29 patents #3,528 of 70,183Top 6%
UI Utopus Insights: 3 patents #47 of 83Top 60%
📍 Garrison, NY: #3 of 35 inventorsTop 9%
🗺 New York: #3,527 of 115,490 inventorsTop 4%
Overall (All Time): #107,192 of 4,157,543Top 3%
33
Patents All Time

Issued Patents All Time

Showing 26–33 of 33 patents

Patent #TitleCo-InventorsDate
6005416 Compiled self-resetting CMOS logic array macros Michael P. Beakes, Barbara Alana Chappell, Terry I. Chappell, Barry Lee Dorfman, Bruce M. Fleischer +2 more 1999-12-21
5872462 Programmable logic array and method for its design using a three step approach Paul D. Kartschoke 1999-02-16
5811988 PLA late signal circuitry using a specialized gap cell and PLA late signal circuitry using switched output Paul D. Kartschoke 1998-09-22
5719505 Reduced power PLA Paul D. Kartschoke 1998-02-17
5717344 PLA late signal circuitry using a specialized gap cell and PLA late signal circuitry using switched output Paul D. Kartschoke 1998-02-10
5712790 Method of power reduction in pla's Paul D. Kartschoke 1998-01-27
5495188 Pulsed static CMOS circuit Chih-Liang Chen 1996-02-27
5311079 Low power, high performance PLA Steven F. Oakland, Dac C. Pham, Kenneth J. Shaw 1994-05-10