EP

Erwin Pfeffer

IBM: 55 patents #1,485 of 70,183Top 3%
Overall (All Time): #46,045 of 4,157,543Top 2%
55
Patents All Time

Issued Patents All Time

Showing 26–50 of 55 patents

Patent #TitleCo-InventorsDate
8122224 Clearing selected storage translation buffer entries bases on table origin address Timothy J. Slegel, Lisa C. Heller, Kenneth E. Plambeck 2012-02-21
8117417 Dynamic address translation with change record override Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Charles F. Webb 2012-02-14
8103851 Dynamic address translation with translation table entry format control for indentifying format of the translation table entry Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Charles F. Webb 2012-01-24
8095773 Dynamic address translation with translation exception qualifier Dan F. Greiner, Lisa C. Heller, Damian L. Osisek 2012-01-10
8082405 Dynamic address translation with fetch protection Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel +1 more 2011-12-20
8041922 Enhanced dynamic address translation with load real address function Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Gustav E. Sittmann, III 2011-10-18
8041923 Load page table entry address instruction execution based on an address translation format control field Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Gustav E. Sittmann, III 2011-10-18
8037278 Dynamic address translation with format control Dan F. Greiner, Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel, Charles F. Webb 2011-10-11
8019964 Dynamic address translation with DAT protection Dan F. Greiner, Charles W. Gainey, Jr., Lisa C. Heller, Damian L. Osisek, Timothy J. Slegel +1 more 2011-09-13
7975182 Method, system and computer program product for generating trace data Debbie A. St. Onge, Jane H. Bartik, Barry W. Krumm, Chung-Lung K. Shum 2011-07-05
7930514 Method, system, and computer program product for implementing a dual-addressable cache Norbert Hagspiel, Bruce Wagar 2011-04-19
7890731 Clearing selected storage translation buffer entries based on table origin address Timothy J. Slegel, Lisa C. Heller, Kenneth E. Plambeck 2011-02-15
7530067 Filtering processor requests based on identifiers Timothy J. Slegel, Lisa C. Heller, Ute Gaertner 2009-05-05
7401185 Buffered indexing to manage hierarchical tables Ute Gaertner, Bruce Wagar 2008-07-15
7284100 Invalidating storage, clearing buffer entries, and an instruction therefor Timothy J. Slegel, Lisa C. Heller, Kenneth E. Plambeck 2007-10-16
7281115 Method, system and program product for clearing selected storage translation buffer entries Timothy Siegel, Lisa C. Heller, Kenneth E. Plambeck 2007-10-09
7197601 Method, system and program product for invalidating a range of selected storage translation table entries Timothy J. Slegel, Lisa C. Heller, Kenneth E. Plambeck 2007-03-27
7020761 Blocking processing restrictions based on page indices Timothy Siegel, Bruce Wagar, Ute Gaertner, Lisa C. Heller 2006-03-28
6996698 Blocking processing restrictions based on addresses Timothy J. Slegel, Jane H. Bartik, Lisa C. Heller, Ute Gaertner 2006-02-07
6766434 Method for sharing a translation lookaside buffer between CPUs Ute Gaertner, Norbert Hagspiel, Frank Lehnert, Kerstin Claudia Schelm 2004-07-20
6694344 Examination of residues of data-conversions Guenter Gerwig, Juergen Haess, Michael K. Kroener 2004-02-17
6418522 Translation lookaside buffer for virtual memory systems Ute Gaertner, John D. Macdougall, Kerstin Claudia Schelm 2002-07-09
6237076 Method for register renaming by copying a 32 bits instruction directly or indirectly to a 64 bits instruction Ute Gaertner, Klaus J. Getzlaff, Oliver Laub 2001-05-22
6108771 Register renaming with a pool of physical registers Ute Gaertner, Klaus J. Getzlaff, Hans-Werner Tast 2000-08-22
6032233 Storage array allowing for multiple, simultaneous write accesses Peter Löffler, Thomas Pfluger, Hans-Werner Tast 2000-02-29