KG

Klaus J. Getzlaff

IBM: 21 patents #5,175 of 70,183Top 8%
Overall (All Time): #211,977 of 4,157,543Top 6%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6275839 Method and system for immediate exponent normalization in a fast floating point adder Gunter Gerwig, Michael Kroner 2001-08-14
6237076 Method for register renaming by copying a 32 bits instruction directly or indirectly to a 64 bits instruction Ute Gaertner, Oliver Laub, Erwin Pfeffer 2001-05-22
6108771 Register renaming with a pool of physical registers Ute Gaertner, Erwin Pfeffer, Hans-Werner Tast 2000-08-22
6014756 High availability error self-recovering shared cache for multiprocessor systems Gerhard Dottling, Bernd Leppla, Wille Udo 2000-01-11
5996063 Management of both renamed and architected registers in a superscalar computer system Ute Gaertner, Thomas Koehler, Erwin Pfeffer 1999-11-30
5978957 Very fast pipelined shifter element with parity prediction Wilhelm Haller, Erwin Pfeffer, Ute Gaertner, Gunter Gerwig 1999-11-02
5964845 Processing system having improved bi-directional serial clock communication circuitry Robert E. Braun, Wilhelm Haller, Thomas Pfluger, Dietmar Schmunkamp 1999-10-12
5889969 Logical bus structure including plural physical busses for a multiprocessor system with a multi-level cache memory structure Bernd Leppla, Hans-Warner Tast, Udo Wille 1999-03-30
5875123 Carry-select adder with pre-counting of leading zero digits Son Dao Trong, Gunter Gerwig, Wilhelm Haller 1999-02-23
5870601 Data processing apparatus and method for correcting faulty microcode in a ROM device via a flag microinstruction in a RAM device including corrected microcode Thomas Pflueger, Ralph C. Koester, Christian Mertin, Hans-Werner Tast 1999-02-09
5754875 Computer system with double width data bus Johann Hajdu, Wilhelm Haller, Birgit Withelm 1998-05-19
5594876 Arbitration protocol for a bidirectional bus for handling access requests to a logically divided memory in a multiprocessor system Udo Wille 1997-01-14
5473574 Multi-port static random access memory with fast write-thru scheme Rainer Clemen 1995-12-05
5311519 Multiplexer Thomas Pflueger, Hans-Werner Tast 1994-05-10
5303365 Clock generation in a multi-chip computer system Johann Hajdu, Guenter Knauft 1994-04-12
5138707 Method of operating a timer in a digital data processing system Wilhelm Haller, Johann Hajdu 1992-08-11
5070471 High speed multiplier which divides multiplying factor into parts and adds partial end products Son Dao-Trong, Klaus Helwig 1991-12-03
4656578 Device in the instruction unit of a pipeline processor for instruction interruption and repetition Herbert Chilinski, Johann Hajdu, Stephan Richter 1987-04-07
4631663 Macroinstruction execution in a microprogram-controlled processor Herbert Chilinski, Johann Hajdu, Franz J. Raeth 1986-12-23
4400776 Data processor control subsystem Dieter Bazlen, Dietrich W. Bock, Johann Hajdu, Helmut Painke 1983-08-23
4398247 Control device for directing execution of forced operations in a data processing system Dieter Bazlen, Dietrich W. Bock, Johann Hajdu, Helmut Painke 1983-08-09