Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9720648 | Optimized structure for hexadecimal and binary multiplier array | Silvia M. Mueller | 2017-08-01 |
| 9563400 | Optimized structure for hexadecimal and binary multiplier array | Silvia M. Mueller | 2017-02-07 |
| 9430190 | Fused multiply add pipeline | Michael Klein, Christophe J. Layer, Silvia M. Mueller | 2016-08-30 |
| 5912453 | Multiple application chip card with decoupled programs | Klaus P. Gungl | 1999-06-15 |
| 5875123 | Carry-select adder with pre-counting of leading zero digits | Gunter Gerwig, Klaus J. Getzlaff, Wilhelm Haller | 1999-02-23 |
| 5363321 | Digital circuit for calculating a logarithm of a number | Klaus Helwig, Markus Loch | 1994-11-08 |