Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5889969 | Logical bus structure including plural physical busses for a multiprocessor system with a multi-level cache memory structure | Klaus J. Getzlaff, Bernd Leppla, Udo Wille | 1999-03-30 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5889969 | Logical bus structure including plural physical busses for a multiprocessor system with a multi-level cache memory structure | Klaus J. Getzlaff, Bernd Leppla, Udo Wille | 1999-03-30 |