Issued Patents All Time
Showing 251–275 of 501 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7939417 | Bipolar transistor and back-gated transistor structure and method | Andres Bryant, William F. Clark, Jr. | 2011-05-10 |
| 7937675 | Structure including transistor having gate and body in direct self-aligned contact | Brent A. Anderson, Andres Bryant, William F. Clark, Jr. | 2011-05-03 |
| 7935560 | Imagers having electrically active optical elements | Brent A. Anderson, John J. Ellis-Monaghan | 2011-05-03 |
| 7932134 | Method of forming a semiconductor structure | William F. Clark, Jr. | 2011-04-26 |
| 7915670 | Asymmetric field effect transistor structure and method | Brent A. Anderson, Andres Bryant, William F. Clark, Jr. | 2011-03-29 |
| 7910418 | Complementary metal gate dense interconnect and method of manufacturing | Brent A. Anderson, Andres Bryant, William F. Clark, Jr. | 2011-03-22 |
| 7902625 | Metal-gate thermocouple | Brent A. Anderson, Andres Bryant | 2011-03-08 |
| 7902608 | Integrated circuit device with deep trench isolation regions for all inter-well and intra-well isolation and with a shared contact to a junction between adjacent device diffusion regions and an underlying floating well section | Brent A. Anderson, Andres Bryant | 2011-03-08 |
| 7902000 | MugFET with stub source and drain regions | Brent A. Anderson, Andres Bryant | 2011-03-08 |
| 7898065 | Structure and method for device-specific fill for improved anneal uniformity | Brent A. Anderson | 2011-03-01 |
| 7891865 | Structure for bolometric on-chip temperature sensor | William F. Clark, Jr. | 2011-02-22 |
| 7888780 | Semiconductor structures incorporating multiple crystallographic planes and methods for fabrication thereof | Brent A. Anderson, Jed H. Rankin | 2011-02-15 |
| 7888750 | Multi-fin multi-gate field effect transistor with tailored drive current | Brent A. Anderson | 2011-02-15 |
| 7888743 | Substrate backgate for trigate FET | Brent A. Anderson, Matthew J. Breitwisch | 2011-02-15 |
| 7888736 | MUGFET with optimized fill structures | Brent A. Anderson, Andres Bryant | 2011-02-15 |
| 7877712 | System for and method of verifying IC authenticity | Brent A. Anderson | 2011-01-25 |
| 7871876 | Method of forming a dual-plane complementary metal oxide semiconductor | Brent A. Anderson | 2011-01-18 |
| 7851865 | Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure | Brent A. Anderson, Andres Bryant, John J. Ellis-Monaghan | 2010-12-14 |
| 7851315 | Method for fabricating a field effect transistor having a dual thickness gate electrode | Brent A. Anderson, Andres Bryant, William F. Clark, Jr. | 2010-12-14 |
| 7851283 | Field effect transistor with raised source/drain fin straps | Brent A. Anderson, Thomas Ludwig | 2010-12-14 |
| 7847320 | Dense chevron non-planar field effect transistors and method | Brent A. Anderson, Andres Bryant | 2010-12-07 |
| 7843016 | Asymmetric field effect transistor structure and method | Brent A. Anderson, Andres Bryant, William F. Clark, Jr. | 2010-11-30 |
| 7838355 | Differential nitride pullback to create differential NFET to PFET divots for improved performance versus leakage | Brent A. Anderson, Suk Hoon Ku | 2010-11-23 |
| 7838353 | Field effect transistor with suppressed corner leakage through channel material band-edge modulation, design structure and method | Brent A. Anderson | 2010-11-23 |
| 7829407 | Method of fabricating a stressed MOSFET by bending SOI region | Brent A. Anderson, Andres Bryant | 2010-11-09 |