Issued Patents All Time
Showing 101–125 of 362 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9575728 | Random number generation security | Bartholomew Blaner, Benjamin Herrenschmidt, David A. Larson Stanton | 2017-02-21 |
| 9563558 | Techniques for implementing barriers to efficiently support cumulativity in a weakly-ordered memory system | Guy L. Guthrie, Hugh Shen, William J. Starke | 2017-02-07 |
| 9529760 | Topology specific replicated bus unit addressing in a data processing system | Richard Louis Arndt, Florian A. Auernhammer, Hugh Shen | 2016-12-27 |
| 9514049 | Cache backing store for transactional memory | Guy L. Guthrie, Hien Minh Le, William J. Starke, Phillip G. Williams | 2016-12-06 |
| 9514045 | Techniques for implementing barriers to efficiently support cumulativity in a weakly-ordered memory system | Guy L. Guthrie, Hugh Shen, William J. Starke | 2016-12-06 |
| 9514083 | Topology specific replicated bus unit addressing in a data processing system | Richard Louis Arndt, Florian A. Auernhammer, Hugh Shen | 2016-12-06 |
| 9501411 | Cache backing store for transactional memory | Guy L. Guthrie, Hien Minh Le, William J. Starke, Phillip G. Williams | 2016-11-22 |
| 9430380 | Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency | Guy L. Guthrie, Hugh Shen | 2016-08-30 |
| 9430166 | Interaction of transactional storage accesses with other atomic semantics | Bradly G. Frey, Guy L. Guthrie, Cathy May | 2016-08-30 |
| 9417846 | Techniques for improving random number generation security | Bartholomew Blaner, Benjamin Herrenschmidt, David A. Larson Stanton | 2016-08-16 |
| 9418007 | Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency | Guy L. Guthrie, Hugh Shen | 2016-08-16 |
| 9396127 | Synchronizing access to data in shared memory | Guy L. Guthrie, Hugh Shen | 2016-07-19 |
| 9396115 | Rewind only transactions in a data processing system supporting transactional storage accesses | Robert J. Blainey, Bradly G. Frey, Guy L. Guthrie, Cathy May | 2016-07-19 |
| 9390026 | Synchronizing access to data in shared memory | Guy L. Guthrie, Hugh Shen | 2016-07-12 |
| 9390024 | Bypassing a store-conditional request around a store queue | Sanjeev Ghai, Guy L. Guthrie, Hugh Shen | 2016-07-12 |
| 9372797 | Adaptively enabling and disabling snooping fastpath commands | Guy L. Guthrie, Hien Minh Le, Hugh Shen, Phillip G. Williams | 2016-06-21 |
| 9367348 | Protecting the footprint of memory transactions from victimization | Sanjeev Ghai, Guy L. Guthrie, Jonathan R. Jackson | 2016-06-14 |
| 9367264 | Transaction check instruction for memory transactions | Bradly G. Frey, Guy L. Guthrie, Cathy May | 2016-06-14 |
| 9367263 | Transaction check instruction for memory transactions | Bradly G. Frey, Guy L. Guthrie, Cathy May | 2016-06-14 |
| 9342454 | Nested rewind only and non rewind only transactions in a data processing system supporting transactional storage accesses | Bradly G. Frey, Guy L. Guthrie, Cathy May | 2016-05-17 |
| 9304936 | Bypassing a store-conditional request around a store queue | Sanjeev Ghai, Guy L. Guthrie, Hugh Shen | 2016-04-05 |
| 9274856 | Improving processor performance for instruction sequences that include barrier instructions | Guy L. Guthrie, William J. Starke | 2016-03-01 |
| 9244724 | Management of transactional memory access requests by a cache memory | Sanjeev Ghai, Guy L. Guthrie, Jonathan R. Jackson | 2016-01-26 |
| 9244725 | Management of transactional memory access requests by a cache memory | Sanjeev Ghai, Guy L. Guthrie, Jonathan R. Jackson | 2016-01-26 |
| 9244846 | Ensuring causality of transactional storage accesses interacting with non-transactional storage accesses | Bradly G. Frey, Cathy May | 2016-01-26 |