Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10699050 | Front-end-of-line shape merging cell placement and optimization | Erwin Behnen, Lawrence A. Clevenger, Patrick Watson, Chih-Chao Yang, Timothy A. Schell | 2020-06-30 |
| 10586009 | Hierarchical trim management for self-aligned double patterning | Laura R. Darden | 2020-03-10 |
| 10503864 | Using unused wires on very-large-scale integration chips for power supply decoupling | Alan P. Wagstaff | 2019-12-10 |
| 10248749 | Automated attribute propagation and hierarchical consistency checking for non-standard extensions | Robert M. Averill, III, Erwin Behnen | 2019-04-02 |
| 10223487 | Automated attribute propagation and hierarchical consistency checking for non-standard extensions | Robert M. Averill, III, Erwin Behnen | 2019-03-05 |
| 10114649 | Thermal availability based instruction assignment for execution | K. Paul Muller | 2018-10-30 |
| 9977851 | Automated attribute propagation and hierarchical consistency checking for non-standard extensions | Robert M. Averill, III, Erwin Behnen | 2018-05-22 |
| 9971861 | Selective boundary overlay insertion for hierarchical circuit design | Erwin Behnen, Michael S. Gray, Matthew T. Guzowski | 2018-05-15 |
| 9892222 | Automated attribute propagation and hierarchical consistency checking for non-standard extensions | Robert M. Averill, III, Erwin Behnen | 2018-02-13 |
| 9728274 | Error control using threshold based comparison of error signatures | — | 2017-08-08 |
| 9626220 | Computer system using partially functional processor core | Marcel Mitran, K. Paul Muller, William J. Rooney, Joran S. C. Siu | 2017-04-18 |
| 9384857 | Error control using threshold based comparison of error signatures | — | 2016-07-05 |
| 9201727 | Error protection for a data bus | William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David L. Rude | 2015-12-01 |
| 9041428 | Placement of storage cells on an integrated circuit | William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David L. Rude | 2015-05-26 |
| 9043683 | Error protection for integrated circuits | William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David L. Rude | 2015-05-26 |
| 9021328 | Shared error protection for register banks | William V. Huott, Kevin W. Kark, John G. Massey, K. Paul Muller, David L. Rude | 2015-04-28 |
| 7898285 | Optimal local supply voltage determination circuit | Kerry Bernstein | 2011-03-01 |
| 7525373 | Compensation of process and voltage variability in multi-threshold dynamic voltage scaling circuits | Clarence R. Ogilvie, David J. Hathaway | 2009-04-28 |
| 7508250 | Testing for normal or reverse temperature related delay variations in integrated circuits | Kerry Bernstein | 2009-03-24 |