Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7058131 | Signal transmission system with programmable voltage reference | Daniel M. Dreps, Frank D. Ferraiolo | 2006-06-06 |
| 7044633 | Method to calibrate a chip with multiple temperature sensitive ring oscillators by calibrating only TSRO | Joachim Clabes, Lawrence Powell, Michael Fan Wang | 2006-05-16 |
| 6934658 | Computer chip heat responsive method and apparatus | Joachim Clabes, Lawrence Powell, Michael Fan Wang | 2005-08-23 |
| 6925549 | Asynchronous pipeline control interface using tag values to control passing data through successive pipeline stages | Peter W. Cook, Andrew D. Davies, Stanley E. Schuster | 2005-08-02 |
| 6879928 | Method and apparatus to dynamically recalibrate VLSI chip thermal sensors through software control | Joachim Clabes, Lawrence Powell, Michael Fan Wang, Balaram Sinharoy, Michael Stephen Floyd | 2005-04-12 |
| 6668358 | Dual threshold gate array or standard cell power saving library circuits | David M. Friend, Nghia V. Phan, Byron D. Scott, Bradley C. White | 2003-12-23 |
| 6635518 | SOI FET and method for creating FET body connections with high-quality matching characteristics and no area penalty for partially depleted SOI technologies | Anthony Gus Aipperspach, Jente B. Kuang, John E. Sheets, II | 2003-10-21 |
| 6504212 | Method and apparatus for enhanced SOI passgate operations | David H. Allen, Jente B. Kuang, Pong-Fei Lu, Mary J. Saccamango | 2003-01-07 |
| 6429689 | Method and apparatus for controlling both active and standby power in domino circuits | David H. Allen | 2002-08-06 |
| 6407584 | Charge booster for CMOS dynamic circuits | Andrew D. Davies | 2002-06-18 |
| 6337584 | Method and apparatus for reducing bipolar current effects in silicon-on-insulator (SOI) dynamic logic circuits | Andrew D. Davies, Frederick J. Ziegler | 2002-01-08 |
| 6329846 | Cross-coupled dual rail dynamic logic circuit | Andrew D. Davies | 2001-12-11 |
| 6326814 | Method and apparatus for enhancing noise tolerance in dynamic silicon-on-insulator logic gates | Andrew D. Davies | 2001-12-04 |
| 6232799 | Method and apparatus for selectively controlling weak feedback in regenerative pass gate logic circuits | David H. Allen | 2001-05-15 |
| 6201431 | Method and apparatus for automatically adjusting noise immunity of an integrated circuit | David H. Allen | 2001-03-13 |
| 6002292 | Method and apparatus to control noise in a dynamic circuit | David H. Allen | 1999-12-14 |
| 4941120 | Floating point normalization and rounding prediction circuit | Jeffrey Douglas Brown, Donald Lee Freerksen, Scott A. Hilker | 1990-07-10 |
| 4926370 | Method and apparatus for processing postnormalization and rounding in parallel | Jeffrey Douglas Brown, Donald Lee Freerksen, Scott A. Hilker | 1990-05-15 |