DD

Daniel M. Dreps

IBM: 180 patents #198 of 70,183Top 1%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
HI Hitachi: 1 patents #17,742 of 28,497Top 65%
VC Verisilicon Holdings Co.: 1 patents #25 of 55Top 50%
📍 Georgetown, TX: #4 of 611 inventorsTop 1%
🗺 Texas: #113 of 125,132 inventorsTop 1%
Overall (All Time): #4,174 of 4,157,543Top 1%
181
Patents All Time

Issued Patents All Time

Showing 101–125 of 181 patents

Patent #TitleCo-InventorsDate
7895374 Dynamic segment sparing and repair in a memory system Frank D. Ferraiolo, Ravi Kumar Arimilli, Kevin C. Gower, Robert J. Reese 2011-02-22
7888968 Configurable pre-emphasis driver with selective constant and adjustable output impedance modes John C. Schiff, Dhaval Sejpal 2011-02-15
7890676 Memory systems for automated computing machinery Kevin C. Gower, Warren E. Maule, Robert B. Tremaine 2011-02-15
7859318 Delay line regulation using high-frequency micro-regulators Daniel J. Friedman, Seongwon Kim, Hector Saenz, Glen A. Wiedemeier 2010-12-28
7813266 Self-healing chip-to-chip interface Wiren D. Becker, Frank D. Ferraiolo, Anand Haridass, Robert J. Reese 2010-10-12
7795762 On-chip high frequency power supply noise sensor Seongwon Kim, Michael A. Sperling 2010-09-14
7773689 Multimodal memory controllers Dhaval Sejpal, Glen A. Wiedemeier 2010-08-10
7739562 Programmable diagnostic memory module Moises Cases, Bhyrav M. Mutnury, Nam H. Pham, Daniel N. de Araujo 2010-06-15
7733984 Implementing phase rotator circuits with embedded polyphase filter network stage Steven J. Baumgartner, Anthony R. Bonaccio, John F. Bulzacchelli 2010-06-08
7730369 Method for performing memory diagnostics using a programmable diagnostic memory module Moises Cases, Bhyrav M. Mutnury, Nam H. Pham, Daniel N. de Araujo 2010-06-01
7729153 276-pin buffered memory module with enhanced fault tolerance Frank D. Ferraiolo, Kevin C. Gower, Mark W. Kellogg, Roger A. Rippens 2010-06-01
7710144 Controlling for variable impedance and voltage in a memory system David Jia Chen, William F. Lawson, David W. Mann 2010-05-04
7696787 Signal history controlled slew-rate transmission method and bus interface transmitter Daniel N. de Araujo, Bhyrav M. Mutnury 2010-04-13
7624297 Architecture for a physical interface of a high speed front side bus Steven J. Baumgartner, Anthony R. Bonaccio, Timothy C. Buchholtz, Charles P. Geer, Mounir Meghelli +3 more 2009-11-24
7612621 System for providing open-loop quadrature clock generation Kyu-hyoun Kim, Paul W. Coteus 2009-11-03
7551468 276-pin buffered memory module with enhanced fault tolerance Frank D. Ferraiolo, Kevin C. Gower, Mark W. Kellogg, Roger A. Rippens 2009-06-23
7529112 276-Pin buffered memory module with enhanced fault tolerance and a performance-optimized pin assignment Frank D. Ferraiolo, Kevin C. Gower, Roger A. Rippens 2009-05-05
7521968 Slew rate control for driver circuit John C. Schief, Glen A. Wiedemeier, Joel D. Ziegelbein 2009-04-21
7477068 System for reducing cross-talk induced source synchronous bus clock jitter Bao G. Truong, Anand Haridass, John C. Schiff, Joel D. Ziegelbein 2009-01-13
7461287 Elastic interface de-skew mechanism Frank D. Ferraiolo, Gary A. Peterson, Robert J. Reese 2008-12-02
7447831 Memory systems for automated computing machinery Kevin C. Gower, Warren E. Maule, Robert B. Tremaine 2008-11-04
7440531 Dynamic recalibration mechanism for elastic interface Frank D. Ferraiolo, Gary A. Peterson, Robert J. Reese 2008-10-21
7403409 276-pin buffered memory module with enhanced fault tolerance Frank D. Ferraiolo, Kevin C. Gower, Mark W. Kellogg, Roger A. Rippens 2008-07-22
7385437 Digitally tunable high-current current reference with high PSRR Norman K. James, Hector Saenz 2008-06-10
7382151 Method for reducing cross-talk induced source synchronous bus clock jitter Bao G. Truong, Anand Haridass, John C. Schiff, Joel D. Ziegelbein 2008-06-03