Issued Patents All Time
Showing 26–35 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5764969 | Method and system for enhanced management operation utilizing intermixed user level and supervisory level instructions with partial concept synchronization | James Allan Kahle, Soummya Mallick, Aubrey Deene Ogden, John V. Sell | 1998-06-09 |
| 5765191 | Method for implementing a four-way least recently used (LRU) mechanism in high-performance | Soummya Mallick, Rajesh Patel, Michael Putrino | 1998-06-09 |
| 5758141 | Method and system for selective support of non-architected instructions within a superscaler processor system utilizing a special access bit within a machine state register | James Allan Kahle, Soummya Mallick, Aubrey Deene Ogden, John V. Sell | 1998-05-26 |
| 5754811 | Instruction dispatch queue for improved instruction cache to queue timing | Michael Putrino, Soummya Mallick | 1998-05-19 |
| 5752014 | Automatic selection of branch prediction methodology for subsequent branch instruction based on outcome of previous branch prediction | Soummya Mallick | 1998-05-12 |
| 5717587 | Method and system for recording noneffective instructions within a data processing system | Bryan Black, Marvin Denman, Lee Evan Eisen, Robert T. Golla, Soummya Mallick +1 more | 1998-02-10 |
| 5715420 | Method and system for efficient memory management in a data processing system utilizing a dual mode translation lookaside buffer | James Allan Kahle, Aubrey Deene Ogden, John V. Sell, Gregory L. Limes | 1998-02-03 |
| 5694565 | Method and device for early deallocation of resources during load/store multiple operations to allow simultaneous dispatch/execution of subsequent instructions | James Allan Kahle, Soummya Mallick, Aubrey Deene Ogden | 1997-12-02 |
| 5619408 | Method and system for recoding noneffective instructions within a data processing system | Bryan Black, Marvin Denman, Lee Evan Eisen, Robert T. Golla, Soummya Mallick +1 more | 1997-04-08 |
| 5611063 | Method for executing speculative load instructions in high-performance processors | Soummya Mallick, Michael Putrino | 1997-03-11 |