Issued Patents All Time
Showing 26–50 of 65 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10055383 | Matrix circuits | Ali Shafiee Ardestani | 2018-08-21 |
| 10049733 | Reusing sneak current in accessing memory cells | Erik Ordentlich, Yoocharn Jeon | 2018-08-14 |
| 10042819 | Convolution accelerators | Miao Hu, John Paul Strachan | 2018-08-07 |
| 10025663 | Local checkpointing using a multi-level cell | Doe Hyun Yoon, Robert Schreiber, Paolo Faraboschi, Jichuan Chang, Parthasarathy Ranganathan | 2018-07-17 |
| 10019176 | Smart memory buffers | Doe Hyun Yoon, Jichuan Chang, Parthasarathy Ranganathan | 2018-07-10 |
| 9972387 | Sensing circuit for resistive memory | Martin Foltin, Yoocharn Jeon, Brent Buchanan, Erik Ordentlich, James S. Ignowski +1 more | 2018-05-15 |
| 9934085 | Invoking an error handler to handle an uncorrectable error | Doe Hyun Yoon, Jichuan Chang, Parthasarathy Ranganathan, Robert Schreiber, Norman Paul Jouppi | 2018-04-03 |
| 9911491 | Determining a resistance state of a cell in a crossbar memory array | Erik Ordentlich | 2018-03-06 |
| 9910827 | Vector-matrix multiplications involving negative values | Ben Feinberg, Ali Shafiee-Ardestani | 2018-03-06 |
| 9898365 | Global error correction | Doe Hyun Yoon | 2018-02-20 |
| 9852792 | Non-volatile multi-level-cell memory with decoupled bits for higher performance and energy efficiency | Han Bin Yoon, Norman Paul Jouppi | 2017-12-26 |
| 9846550 | Memory access methods and apparatus | Aniruddha Nagendran Udipi, Niladrish Chatterjee, Rajeev Balasubramonian, Alan L. Davis, Norman Paul Jouppi | 2017-12-19 |
| 9832550 | Radix enhancement for photonic packet switch | Moray McLaren, Raymond G. Beausoleil, Norman Paul Jouppi, Marco Fiorentino, Alan L. Davis +1 more | 2017-11-28 |
| 9773531 | Accessing memory | Doe Hyun Yoon, Jichuan Chang, Parthasarathy Ranganthan | 2017-09-26 |
| 9773547 | Non-volatile memory with multiple latency tiers | Richard H. Henze, Yoocharn Jeon, Martin Foltin, Erik Ordentlich, Gregg B. Lesartre +1 more | 2017-09-26 |
| 9767901 | Circuits having selector devices with different I-V responses | Amit Sharma, Gary Gibson, Martin Foltin, Greg Astfalk | 2017-09-19 |
| 9710335 | Versioned memory Implementation | Doe Hyun Yoon, Terence P. Kelly, Jichuan Chang, Robert Schreiber, Parthasarathy Ranganathan | 2017-07-18 |
| 9620181 | Adaptive granularity row-buffer cache | Sheng Li, Norman Paul Jouppi | 2017-04-11 |
| 9600359 | Local error detection and global error correction | Aniruddha Nagendran Udipi, Norman Paul Jouppi, Alan L. Davis, Rajeev Balasubramonian | 2017-03-21 |
| 9601189 | Representing data using a group of multilevel memory cells | Doe Hyun Yoon, Jichuan Chang, Robert Schreiber, Norman Paul Jouppi | 2017-03-21 |
| 9443580 | Multi-level cell memory | Han Bin Yoon, Norman Paul Jouppi | 2016-09-13 |
| 9411757 | Memory interface | Aniruddha Nagendran Udipi, Norman Paul Jouppi, Rajeev Balasubramonian, Alan L. Davis | 2016-08-09 |
| 9361955 | Memory access methods and apparatus | Aniruddha Nagendran Udipi, Niladrish Chatterjee, Rajeev Balasubramonian, Alan L. Davis, Norman Paul Jouppi | 2016-06-07 |
| 9298621 | Managing chip multi-processors through virtual domains | Sheng Li, Norman Paul Jouppi | 2016-03-29 |
| 9164904 | Accessing remote memory on a memory blade | Kevin T. Lim, Norman Paul Jouppi, Robert Schreiber | 2015-10-20 |