Issued Patents All Time
Showing 1–25 of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12197890 | Multiplier and adder in systolic array | Lifeng Nai | 2025-01-14 |
| 12189472 | Error checking for systolic array computation | Norman Paul Jouppi | 2025-01-07 |
| 11915139 | Modifying machine learning models to improve locality | Nishant Patil, Norman Paul Jouppi | 2024-02-27 |
| 11853156 | Error checking for systolic array computation | Norman Paul Jouppi | 2023-12-26 |
| 11507452 | Error checking for systolic array computation | Norman Paul Jouppi | 2022-11-22 |
| 11263529 | Modifying machine learning models to improve locality | Nishant Patil, Norman Paul Jouppi | 2022-03-01 |
| 10691344 | Separate memory controllers to access data in memory | Sheng Li, Jichuan Chang, Ke Chen, Parthasarathy Ranganathan, Norman Paul Jouppi | 2020-06-23 |
| 10621040 | Memory controllers to form symbols based on bursts | Robert Schreiber, Sheng Li | 2020-04-14 |
| 10585602 | Smart memory buffers | Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan | 2020-03-10 |
| 10318365 | Selective error correcting code and memory access granularity switching | Sheng Li, Norman Paul Jouppi | 2019-06-11 |
| 10241711 | Multiversioned nonvolatile memory hierarchy for persistent memory | Sheng Li, Jishen Zhao, Norman Paul Jouppi | 2019-03-26 |
| 10025663 | Local checkpointing using a multi-level cell | Robert Schreiber, Paolo Faraboschi, Jichuan Chang, Naveen Muralimanohar, Parthasarathy Ranganathan | 2018-07-17 |
| 10019176 | Smart memory buffers | Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan | 2018-07-10 |
| 9934085 | Invoking an error handler to handle an uncorrectable error | Jichuan Chang, Naveen Muralimanohar, Parthasarathy Ranganathan, Robert Schreiber, Norman Paul Jouppi | 2018-04-03 |
| 9898365 | Global error correction | Naveen Muralimanohar | 2018-02-20 |
| 9846653 | Performing write operations on main memory | Jichuan Chang, Robert Schreiber | 2017-12-19 |
| 9832470 | Method for modeling coding information of video signal for compressing/decompressing coding information | Byeong Moon Jeon, Ji Ho Park, Seung Wook Park | 2017-11-28 |
| 9823986 | Memory node error correction | Sheng Li, Norman Paul Jouppi, Paolo Faraboschi, Dwight L. Barron | 2017-11-21 |
| 9773531 | Accessing memory | Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganthan | 2017-09-26 |
| 9710335 | Versioned memory Implementation | Terence P. Kelly, Jichuan Chang, Naveen Muralimanohar, Robert Schreiber, Parthasarathy Ranganathan | 2017-07-18 |
| 9601189 | Representing data using a group of multilevel memory cells | Jichuan Chang, Naveen Muralimanohar, Robert Schreiber, Norman Paul Jouppi | 2017-03-21 |
| 9575542 | Computer power management | Moray McLaren, Dejan S. Milojicic, Robert Schreiber, Norman Paul Jouppi | 2017-02-21 |
| 9514044 | Multi-level cache tracking table | Jichuan Chang, Parthasarathy Ranganathan | 2016-12-06 |
| 9003247 | Remapping data with pointer | Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman Paul Jouppi | 2015-04-07 |
| 8989265 | Method for modeling coding information of video signal for compressing/decompressing coding information | Byeong Moon Jeon, Ji Ho Park, Seung Wook Park | 2015-03-24 |