Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182628 | Reconfigurable computing pods using optical networks | Xiang Zhou, Andrew T. Swing | 2024-12-31 |
| 12088823 | Rate control machine learning models with feedback control for video encoding | Chenjie Gu, Hongzi Mao, Ching-Han Chiang, Cheng Chen, Jingning Han +7 more | 2024-09-10 |
| 12026118 | Asymmetric data communication for host-device interface | Liqun Cheng | 2024-07-02 |
| 11915139 | Modifying machine learning models to improve locality | Doe Hyun Yoon, Norman Paul Jouppi | 2024-02-27 |
| 11841817 | Bandwidth allocation in asymmetrical switch topologies | Pankaj Makhija | 2023-12-12 |
| 11704158 | Managing processing system efficiency | Liqun Cheng, Rama K. Govindaraju, Haishan ZHU, David Lo, Parthasarathy Ranganathan | 2023-07-18 |
| 11537443 | Reconfigurable computing pods using optical networks | Xiang Zhou, Andrew T. Swing | 2022-12-27 |
| 11537548 | Bandwidth allocation in asymmetrical switch topologies | Pankaj Makhija | 2022-12-27 |
| 11263529 | Modifying machine learning models to improve locality | Doe Hyun Yoon, Norman Paul Jouppi | 2022-03-01 |
| 11188494 | Asymmetric data communication for host-device interface | Liqun Cheng | 2021-11-30 |
| 11042416 | Reconfigurable computing pods using optical networks | Xiang Zhou, Andrew T. Swing | 2021-06-22 |
| 10908964 | Managing processing system efficiency | Liqun Cheng, Rama K. Govindaraju, Haishan ZHU, David Lo, Parthasarathy Ranganathan | 2021-02-02 |
| 10073817 | Optimized matrix multiplication using vector multiplication of interleaved matrix values | Matthew Jeremy Sarett, Rama K. Govindaraju, Benoit Steiner, Vincent O. Vanhoucke | 2018-09-11 |
| 9830303 | Optimized matrix multiplication using vector multiplication of interleaved matrix values | Matthew Jeremy Sarett, Rama K. Govindaraju, Benoit Steiner, Vincent O. Vanhoucke | 2017-11-28 |
| 9748421 | Multiple carbon nanotube transfer and its applications for making high-performance carbon nanotube field-effect transistor (CNFET), transparent electrodes, and three-dimensional integration of CNFETs | Subhasish Mitra, Chung Chun Wan, H.-S. Philip Wong | 2017-08-29 |
| 9645974 | Optimized matrix multiplication using vector multiplication of interleaved matrix values | Matthew Jeremy Sarett, Rama K. Govindaraju, Benoit Steiner, Vincent O. Vanhoucke | 2017-05-09 |
| 9218294 | Multi-level logical block address (LBA) mapping table for solid state | Derrick Preston Chu, Nandan Sridhar, Prasanthi Relangi | 2015-12-22 |
| 8832539 | Write processing for unchanged data with new metadata | Meng Kun Lee, Yingquan Wu | 2014-09-09 |
| 8065634 | System and method for analyzing a nanotube logic circuit | Subhasish Mitra | 2011-11-22 |
| 7911234 | Nanotube logic circuits | Subhasish Mitra | 2011-03-22 |