Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6728868 | System and method for coalescing data utilized to detect data hazards | Ronny Lee Arnold | 2004-04-27 |
| 6721875 | Method and apparatus for implementing a single-syllable IP-relative branch instruction and a long IP-relative branch instruction in a processor which fetches instructions in bundle form | James E. McCormick, Jr., Stephen R. Undy | 2004-04-13 |
| 6715060 | Utilizing a scoreboard with multi-bit registers to indicate a progression status of an instruction that retrieves data | Ronny Lee Arnold | 2004-03-30 |
| 6711671 | Non-speculative instruction fetch in speculative processing | Stephen R. Undy | 2004-03-23 |
| 6711670 | System and method for detecting data hazards within an instruction group of a compiled computer program | Ronny Lee Arnold | 2004-03-23 |
| 6651164 | System and method for detecting an erroneous data hazard between instructions of an instruction group and resulting from a compiler grouping error | Ronny Lee Arnold | 2003-11-18 |
| 6651176 | Systems and methods for variable control of power dissipation in a pipelined processor | Glenn T. Colon-Bonet | 2003-11-18 |
| 6643762 | Processing system and method utilizing a scoreboard to detect data hazards between instructions of computer programs | Ronny Lee Arnold | 2003-11-04 |
| 6622238 | System and method for providing predicate data | Gary J Benjamin, Ronny Lee Arnold | 2003-09-16 |
| 6618801 | Method and apparatus for implementing two architectures in a chip using bundles that contain microinstructions and template information | Patrick Knebel, Kevin Safford, Joel D. Lamb, Stephen R. Undy, Russell C. Brockmann | 2003-09-09 |
| 6618802 | Superscalar processing system and method for selectively stalling instructions within an issue group | Ronny Lee Arnold | 2003-09-09 |
| 6604192 | System and method for utilizing instruction attributes to detect data hazards | Ronny Lee Arnold | 2003-08-05 |
| 6591393 | Masking error detection/correction latency in multilevel cache transfers | Shawn Walker, Dean Mulla, Terry L Lyon | 2003-07-08 |
| 6591360 | Local stall/hazard detect in superscalar, pipelined microprocessor | Rohit Bhatia, Mark Gibson | 2003-07-08 |
| 6587940 | Local stall/hazard detect in superscalar, pipelined microprocessor to avoid re-read of register file | Rohit Bhatia | 2003-07-01 |
| 6490674 | System and method for coalescing data utilized to detect data hazards | Ronny Lee Arnold | 2002-12-03 |
| 6470445 | Preventing write-after-write data hazards by canceling earlier write when no intervening instruction uses value to be written by the earlier write | Ronny Lee Arnold | 2002-10-22 |