Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9431264 | Methods of forming integrated circuits and multiple critical dimension self-aligned double patterning processes | Linus Jang, Young-joon Moon | 2016-08-30 |
| 9412616 | Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products | Ruilong Xie, Kwan-Yong Lim, Min Gyu Sung | 2016-08-09 |
| 9406616 | Merged source/drain and gate contacts in SRAM bitcell | Youngtag Woo | 2016-08-02 |
| 9379027 | Method of utilizing trench silicide in a gate cross-couple construct | — | 2016-06-28 |
| 9362403 | Buried fin contact structures on FinFET semiconductor devices | Ruilong Xie, William J. Taylor, Jr. | 2016-06-07 |
| 9362279 | Contact formation for semiconductor device | Ruilong Xie, Andy Wei, William J. Taylor, Jr., Kwan-Yong Lim, Chanro Park | 2016-06-07 |
| 9362181 | Methods of forming diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products | Ruilong Xie, Min Gyu Sung, Kwan-Yong Lim, Chanro Park | 2016-06-07 |
| 9299781 | Semiconductor devices with contact structures and a gate structure positioned in trenches formed in a layer of material | Ruilong Xie, William J. Taylor, Jr. | 2016-03-29 |
| 9275889 | Method and apparatus for high yield contact integration scheme | Jason R. Cantone, Wenhui Wang | 2016-03-01 |
| 9209037 | Methods for fabricating integrated circuits including selectively forming and removing fin structures | Jason R. Cantone, Linus Jang, Jin Cho | 2015-12-08 |
| 9209038 | Methods for fabricating integrated circuits using self-aligned quadruple patterning | Jason R. Cantone, Linus Jang | 2015-12-08 |
| 9202918 | Methods of forming stressed layers on FinFET semiconductor devices and the resulting devices | Ruilong Xie, William J. Taylor, Jr. | 2015-12-01 |
| 9184169 | Methods of forming FinFET devices in different regions of an integrated circuit product | Youngtag Woo | 2015-11-10 |
| 9171934 | Methods of forming semiconductor devices using a layer of material having a plurality of trenches formed therein | Ruilong Xie, William J. Taylor, Jr. | 2015-10-27 |
| 9171764 | Methods for fabricating integrated circuits using self-aligned quadruple patterning | Jason R. Cantone | 2015-10-27 |
| 9153694 | Methods of forming contact structures on finfet semiconductor devices and the resulting devices | Ruilong Xie, William J. Taylor, Jr. | 2015-10-06 |
| 8796859 | Multilayer interconnect structure and method for integrated circuits | — | 2014-08-05 |