Issued Patents All Time
Showing 26–50 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11646351 | Transistor with multi-level self-aligned gate and source/drain terminals and methods | Johnatan A. Kantarovsky, Jeonghyun Hwang, Siva P. Adusumilli, Ajay Raman | 2023-05-09 |
| 11611002 | Photodiode and/or pin diode structures | Edward W. Kiewra, Siva P. Adusumilli, John J. Ellis-Monaghan | 2023-03-21 |
| 11605649 | Switches in bulk substrate | Siva P. Adusumilli, Alvin J. Joseph, Ramsey Hazbun | 2023-03-14 |
| 11588056 | Structure with polycrystalline active region fill shape(s), and related method | Siva P. Adusumilli, Jagar Singh | 2023-02-21 |
| 11581450 | Photodiode and/or pin diode structures with one or more vertical surfaces | Siva P. Adusumilli, Vibhor Jain, John J. Ellis-Monaghan | 2023-02-14 |
| 11569374 | Implanted isolation for device integration on a common substrate | Siva P. Adusumilli, Jeonghyun Hwang | 2023-01-31 |
| 11567277 | Distributed Bragg reflectors including periods with airgaps | Yusheng Bian, Siva P. Adusumilli | 2023-01-31 |
| 11569170 | Substrate with a buried conductor under an active region for enhanced thermal conductivity and RF shielding | Siva P. Adusumilli, Ramsey Hazbun, Alvin J. Joseph, Steven Bentley | 2023-01-31 |
| 11536914 | Photodetector array with diffraction gratings having different pitches | Yusheng Bian, Siva P. Adusumilli | 2022-12-27 |
| 11502214 | Photodetectors used with broadband signal | Siva P. Adusumilli, Yusheng Bian | 2022-11-15 |
| 11469225 | Device integration schemes leveraging a bulk semiconductor substrate having a <111 > crystal orientation | Jeonghyun Hwang, Siva P. Adusumilli | 2022-10-11 |
| 11437522 | Field-effect transistors with a polycrystalline body in a shallow trench isolation region | Michel J. Abou-Khalil, Steven M. Shank, Rajendran Krishnasamy, John J. Ellis-Monaghan, Anthony K. Stamper | 2022-09-06 |
| 11422303 | Waveguide with attenuator | Siva P. Adusumilli, Yusheng Bian | 2022-08-23 |
| 11362201 | Heterojunction bipolar transistors with undercut extrinsic base regions | Sarah A. McTaggart, Qizhi Liu, Vibhor Jain, Paula M. Fisher, James R. Elliott | 2022-06-14 |
| 11322639 | Avalanche photodiode | Siva P. Adusumilli, John J. Ellis-Monaghan, Vibhor Jain, Ramsey Hazbun, Pernell Dongmo +3 more | 2022-05-03 |
| 11316064 | Photodiode and/or PIN diode structures | Siva P. Adusumilli, John J. Ellis-Monaghan, Vibhor Jain, Andre Sturm | 2022-04-26 |
| 11282740 | Bulk semiconductor structure with a multi-level polycrystalline semiconductor region and method | Siva P. Adusumilli | 2022-03-22 |
| 11264457 | Isolation trenches augmented with a trap-rich layer | Siva P. Adusumilli, Steven M. Shank, Alvin J. Joseph, Anthony K. Stamper | 2022-03-01 |
| 11195715 | Epitaxial growth constrained by a template | Siva P. Adusumilli, Cameron E. Luce, Ramsey Hazbun, Anthony K. Stamper, Alvin J. Joseph | 2021-12-07 |
| 11152520 | Photodetector with reflector with air gap adjacent photodetecting region | Siva P. Adusumilli, Vibhor Jain, John J. Ellis-Monaghan | 2021-10-19 |
| 11152394 | Structure with polycrystalline isolation region below polycrystalline fill shape(s) and selective active device(s), and related method | Siva P. Adusumilli | 2021-10-19 |
| 11049932 | Semiconductor isolation structures comprising shallow trench and deep trench isolation | Steven M. Shank, Bruce W. Porth | 2021-06-29 |
| 10833072 | Heterojunction bipolar transistors having bases with different elevations | Siva P. Adusumilli, Anthony K. Stamper, Vibhor Jain, John J. Ellis-Monaghan | 2020-11-10 |
| 10312356 | Heterojunction bipolar transistors with multiple emitter fingers and undercut extrinsic base regions | Qizhi Liu, Vibhor Jain, James W. Adkisson, Sarah A. McTaggart | 2019-06-04 |
| 9435948 | Silicon waveguide structure with arbitrary geometry on bulk silicon substrate, related systems and program products | Robert K. Leidy, Qizhi Liu, Gary L. Milo, Steven M. Shank | 2016-09-06 |