Issued Patents All Time
Showing 26–35 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10483461 | Embedded MRAM in interconnects and method for producing the same | Wanbing Yi, Yi Jiang, Bharat Bhushan, Mahesh Bhatkar, Juan Boon Tan | 2019-11-19 |
| 10475990 | Pillar contact extension and method for producing the same | Lup San Leong, Wanbing Yi, Cing Gie Lim, Yi Jiang, Juan Boon Tan | 2019-11-12 |
| 10446607 | Integrated two-terminal device with logic device for embedded application | Wanbing Yi, Juan Boon Tan, Soh Yun Siah, Hai Cong, Alex See +3 more | 2019-10-15 |
| 10381403 | MRAM device with improved seal ring and method for producing the same | Yi Jiang, Bharat Bhushan, Mahesh Bhatkar, Wanbing Yi, Juan Boon Tan | 2019-08-13 |
| 10262868 | Self-aligned planarization of low-K dielectrics and method for producing the same | Wanbing Yi, Yi Jiang, Juan Boon Tan, Zhehui Wang | 2019-04-16 |
| 10256273 | High density cross point resistive memory structures and methods for fabricating the same | Juan Boon Tan, Wanbing Yi, Yi Jiang | 2019-04-09 |
| 10158066 | Two pass MRAM dummy solution | Wanbing Yi, Neha Nayyar, Mahesh Bhatkar, Wenjun Liu, Juan Boon Tan | 2018-12-18 |
| 10062733 | Integrated circuits with magnetic tunnel junction memory cells and methods for producing the same | Wanbing Yi, Mahesh Bhatkar, Hui-Hsien Liu, Chin Chuan Neo | 2018-08-28 |
| 9905282 | Top electrode dome formation | Wanbing Yi, Soh Yun Siah, Juan Boon Tan | 2018-02-27 |
| 9865649 | Integrated two-terminal device and logic device with compact interconnects having shallow via for embedded application | Juan Boon Tan, Wanbing Yi, Yi Jiang, Danny Pak-Chum Shum | 2018-01-09 |