Issued Patents All Time
Showing 101–125 of 125 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7608512 | Integrated circuit structure with improved LDMOS design | — | 2009-10-27 |
| 7602017 | Short channel LV, MV, and HV CMOS devices | — | 2009-10-13 |
| 7531888 | Integrated latch-up free insulated gate bipolar transistor | — | 2009-05-12 |
| 7355224 | High voltage LDMOS | — | 2008-04-08 |
| 7220646 | Integrated circuit structure with improved LDMOS design | — | 2007-05-22 |
| 7205612 | Fully silicided NMOS device for electrostatic discharge protection | Keng Foo Lo | 2007-04-17 |
| 7180132 | Enhanced RESURF HVPMOS device with stacked hetero-doping RIM and gradual drift region | Michael Harley-Stead, Jim G. Holt | 2007-02-20 |
| 7154150 | Low triggering N MOS transistor for ESD protection working under fully silicided process without silicide blocks | David Hu | 2006-12-26 |
| 7125777 | Asymmetric hetero-doped high-voltage MOSFET (AH2MOS) | Michael Harley-Stead, Jim G. Holt | 2006-10-24 |
| 7045830 | High-voltage diodes formed in advanced power integrated circuit devices | Micheal Harley-Stead, Jim G. Holt | 2006-05-16 |
| 6873017 | ESD protection for semiconductor products | Alvin Sugerman, Steven Park | 2005-03-29 |
| 6870218 | Integrated circuit structure with improved LDMOS design | — | 2005-03-22 |
| 6855609 | Method of manufacturing ESD protection structure | Guang Ping Hua, Jun Song, Keng Foo Lo | 2005-02-15 |
| 6835985 | ESD protection structure | Guang Ping Hua, Jun Song, Keng Foo Lo | 2004-12-28 |
| 6830966 | Fully silicided NMOS device for electrostatic discharge protection | Keng Foo Lo | 2004-12-14 |
| 6787856 | Low triggering N MOS transistor for electrostatic discharge protection device | David Hu | 2004-09-07 |
| 6787880 | ESD parasitic bipolar transistors with high resistivity regions in the collector | David Hu | 2004-09-07 |
| 6664596 | Stacked LDD high frequency LDMOSFET | Pang Dow Foo, Narayanan Balasubramanian | 2003-12-16 |
| 6589833 | ESD parasitic bipolar transistors with high resistivity regions in the collector | David Hu | 2003-07-08 |
| 6507090 | Fully silicide cascaded linked electrostatic discharge protection | David Hu | 2003-01-14 |
| 6489203 | Stacked LDD high frequency LDMOSFET | Pang Dow Foo, Narayanan Balasubramanian | 2002-12-03 |
| 6444510 | Low triggering N MOS transistor for ESD protection working under fully silicided process without silicide blocks | David Hu | 2002-09-03 |
| 6417541 | ESD protection network with field oxide device and bonding pad | Keng Foo Lo | 2002-07-09 |
| 6329253 | Thick oxide MOS device used in ESD protection circuit | Jun Song, Yonqzang Zhang, Shyue Fong Quek, Ting Cheong Ang, Puay Ing Ong | 2001-12-11 |
| 6310380 | Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers | Keng Foo Lo | 2001-10-30 |