DH

David Hu

NP Nano Silicon Pte.: 6 patents #1 of 6Top 20%
IBM: 6 patents #16,453 of 70,183Top 25%
CM Chartered Semiconductor Manufacturing: 2 patents #256 of 840Top 35%
AT Applied Spintronics Technology: 1 patents #6 of 9Top 70%
📍 Sunnyvale, CA: #1,569 of 14,302 inventorsTop 15%
🗺 California: #35,036 of 386,348 inventorsTop 10%
Overall (All Time): #275,523 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDate
9535976 Information exchange engine providing a critical infrastructure layer and methods of use thereof Ajit S. Shah, Madhukar Thakur, Joyce Thom 2017-01-03
9229962 Information exchange engine providing a critical infrastructure layer and methods of use thereof Ajit S. Shah, Madhukar Thakur, Joyce Thom 2016-01-05
7577956 Method, system and program storage device for accessing memory to perform messaging using a channel coupled to a sender and a receiver Shawfu Chen, Robert O. Dryfoos, Allan Feldman, Jason A. Keenaghan, Peter A. Lewis +3 more 2009-08-18
7154150 Low triggering N MOS transistor for ESD protection working under fully silicided process without silicide blocks Jun Cai 2006-12-26
7140017 Performance of channels used in communicating between senders and receivers Shawfu Chen, Robert O. Dryfoos, Allan Feldman, Jason A. Keenaghan, Peter A. Lewis +3 more 2006-11-21
7089564 High-performance memory queue Shawfu Chen, Robert O. Dryfoos, Allan Feldman, Jason A. Keenaghan, Peter G. Sutton +1 more 2006-08-08
7068604 Managing memory resident queues to control resources of the systems using the queues Shawfu Chen, Robert O. Dryfoos, Allan Feldman, Jason A. Keenaghan, Peter A. Lewis +3 more 2006-06-27
6977838 Method and system for providing a programmable current source for a magnetic memory David Tsang, Xizeng Shi, Po-Kang Wang, Hsu Kai Yang 2005-12-20
6901533 Reconstructing memory residents queues of an inactive processor Shawfu Chen, Robert O. Dryfoos, Allan Feldman, Jason A. Keenaghan, Peter A. Lewis +2 more 2005-05-31
6787856 Low triggering N MOS transistor for electrostatic discharge protection device Jun Cai 2004-09-07
6787880 ESD parasitic bipolar transistors with high resistivity regions in the collector Jun Cai 2004-09-07
6625117 Method and apparatus for switching messages from a primary message channel to a secondary message channel in a message queuing system Shawfu Chen, Robert O. Dryfoos, Allan Feldman, Peter A. Lewis, Masashi E. Miyake +1 more 2003-09-23
6589833 ESD parasitic bipolar transistors with high resistivity regions in the collector Jun Cai 2003-07-08
6507090 Fully silicide cascaded linked electrostatic discharge protection Jun Cai 2003-01-14
6444510 Low triggering N MOS transistor for ESD protection working under fully silicided process without silicide blocks Jun Cai 2002-09-03
6281541 Metal-oxide-metal capacitor for analog devices 2001-08-28
6100155 Metal-oxide-metal capacitor for analog devices 2000-08-08