Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9165920 | Tunable protection system for integrated circuits | Indrajit Manna, Hin Kiong Yap, Jae Soo Park | 2015-10-20 |
| 7205612 | Fully silicided NMOS device for electrostatic discharge protection | Jun Cai | 2007-04-17 |
| 7135743 | Electrostatic discharge protection device with complementary dual drain implant | Indrajit Manna, Pee Ya Tan, Michael Cheng | 2006-11-14 |
| 7064358 | Triggered back-to-back diodes for ESD protection in triple-well CMOS process | Indrajlt Manna, Pee Ya Tan, Raymond Filippi | 2006-06-20 |
| 6998685 | Electrostatic discharge protection device with complementary dual drain implant | Indrajit Manna, Pee Ya Tan, Michael Cheng | 2006-02-14 |
| 6936895 | ESD protection device | Indrajit Manna, Pee Ya Tan, Raymond Filippi | 2005-08-30 |
| 6855609 | Method of manufacturing ESD protection structure | Jun Cai, Guang Ping Hua, Jun Song | 2005-02-15 |
| 6835985 | ESD protection structure | Jun Cai, Guang Ping Hua, Jun Song | 2004-12-28 |
| 6830966 | Fully silicided NMOS device for electrostatic discharge protection | Jun Cai | 2004-12-14 |
| 6555878 | Umos-like gate-controlled thyristor structure for ESD protection | Jun Song, Guang Ping Hua | 2003-04-29 |
| 6458632 | UMOS-like gate-controlled thyristor structure for ESD protection | Jun Song, Guang Ping Hua | 2002-10-01 |
| 6417541 | ESD protection network with field oxide device and bonding pad | Jun Cai | 2002-07-09 |
| 6310380 | Electrostatic discharge protection transistor structure with a trench extending through the source or drain silicide layers | Jun Cai | 2001-10-30 |
| 6265251 | Method to fabricate a thick oxide MOS transistor for electrostatic discharge protection in an STI process | Cai Jun | 2001-07-24 |