Issued Patents All Time
Showing 51–75 of 98 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8048751 | Method for producing a field effect device having self-aligned electrical connections with respect to the gate electrode | Claire Fenouillet-Beranger | 2011-11-01 |
| 8039332 | Method of manufacturing a buried-gate semiconductor device and corresponding integrated circuit | Emilie Bernard, Bernard Guillaumot, Christian Vizioz | 2011-10-18 |
| 7994008 | Transistor device with two planar gates and fabrication process | Romain Wacquez, Damien Lenoble, Robin Cerutti, Thomas Skotnicki | 2011-08-09 |
| 7977187 | Method of fabricating a buried-gate semiconductor device and corresponding integrated circuit | Emilie Bernard, Bernard Guillaumot | 2011-07-12 |
| 7960255 | Process for forming a wire portion in an integrated electronic circuit | Benjamin Dumont, Arnaud Pouydebasque, Markus Müller | 2011-06-14 |
| 7955914 | Method of producing an asymmetric architecture semi-conductor device | Serdar Manakli, Jessy Bustos, Laurent Pain | 2011-06-07 |
| 7923315 | Manufacturing method for planar independent-gate or gate-all-around transistors | Arnaud Pouydebasque, Stephanne Denorme | 2011-04-12 |
| 7915110 | MOS transistor manufacturing | Claire Gallon, Claire Benouillet-Beranger | 2011-03-29 |
| 7910419 | SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness | Claire Fenouillet-Beranger | 2011-03-22 |
| 7902621 | Integrated circuit comprising mirrors buried at different depths | Perceval Coudrain, Michel Marty, Matthieu Bopp | 2011-03-08 |
| 7803668 | Transistor and fabrication process | Romain Wacquez, Jessy Bustos | 2010-09-28 |
| 7804134 | MOSFET on SOI device | Claire Fenouillet-Beranger | 2010-09-28 |
| 7749858 | Process for producing an MOS transistor and corresponding integrated circuit | Claire Gallon, Claire Fenouillet-Beranger | 2010-07-06 |
| 7736840 | Production of two superposed elements within an integrated electronic circuit | Jessy Bustos, Philippe Thony | 2010-06-15 |
| 7691727 | Method for manufacturing an integrated circuit with fully depleted and partially depleted transistors | Michel Marty | 2010-04-06 |
| 7687833 | Component containing a baw filter | Michel Marty, Jean-Christophe Giraudin | 2010-03-30 |
| 7687872 | Back-lit image sensor with a uniform substrate temperature | Yvon Cazaux, Claire Fenouillet-Beranger, Francois Roy | 2010-03-30 |
| 7687356 | Formation of shallow siGe conduction channel | Arnaud Pouydebasque | 2010-03-30 |
| 7638844 | Manufacturing method of semiconductor-on-insulator region structures | Stephane Monfray, Aomar Halimaoui, Damien Lenoble, Claire Fenouillett-Beranger | 2009-12-29 |
| 7601634 | Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor | Damien Lenoble, Robin Cerutti | 2009-10-13 |
| 7556995 | MOS transistor manufacturing | Claire Gallon, Claire Fenouillet-Beranger | 2009-07-07 |
| 7494932 | Method for the formation of an integrated electronic circuit having a closed cavity | Jessy Bustos, Philippe Thony | 2009-02-24 |
| 7456071 | Method for forming a strongly-conductive buried layer in a semiconductor substrate | Michel Marty, Francois Leverd | 2008-11-25 |
| 7420253 | Three-gate transistor structure | Romain Wacquez | 2008-09-02 |
| 7320923 | SRAM cell | Bertrand Borot | 2008-01-22 |