LP

Laurent Pain

CEA: 7 patents #594 of 7,956Top 8%
SS Stmicroelectronics Sa: 3 patents #1,424 of 4,662Top 35%
FS Freeescale Semiconductor: 1 patents #2,021 of 3,767Top 55%
Overall (All Time): #635,756 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
10845705 Method for forming a chemical guiding structure on a substrate and chemoepitaxy method Raluca Tiron, Guillaume CLAVEAU, Ahmed GHARBI, Xavier Chevalier, Christophe Navarro +1 more 2020-11-24
9156306 Lithography method for doubled pitch Jerome Belledent, Sebastien Barnola 2015-10-13
8889550 Lithographic method for making networks of conductors connected by vias Jerome Belledent, Sebastien Barnola 2014-11-18
8252638 Method for forming under a thin layer of a first material portions of another material and/or empty areas Philippe Coronel, Yves Thomas Laplanche 2012-08-28
7955914 Method of producing an asymmetric architecture semi-conductor device Serdar Manakli, Jessy Bustos, Philippe Coronel 2011-06-07
7897308 Method for transferring a predetermined pattern reducing proximity effects Serdar Manakli, Georges Bervin 2011-03-01
7767104 Method for repairing errors of patterns embodied in thin layers 2010-08-03
7202153 Method for forming, under a thin layer of a first material, portions of another material and/or empty areas Philippe Coronel, Yves Thomas Laplanche 2007-04-10