RM

Robert J. Mears

AI Atomera Incorporated: 54 patents #1 of 20Top 5%
RM Rj Mears: 18 patents #1 of 12Top 9%
MT Mears Technologies: 17 patents #1 of 14Top 8%
Overall (All Time): #18,107 of 4,157,543Top 1%
89
Patents All Time

Issued Patents All Time

Showing 25 most recent of 89 patents

Patent #TitleCo-InventorsDate
12417912 Radio frequency (RF) semiconductor devices including a ground plane layer having a superlattice Hideki Takeuchi 2025-09-16
12267996 DRAM sense amplifier architecture with reduced power consumption and related methods Richard S. Roy 2025-04-01
12191160 Method for making a semiconductor superlattices with different non-semiconductor thermal stabilities Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha 2025-01-07
12142641 Method for making gate-all-around (GAA) device including a superlattice Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha, Robert John Stephenson, Hideki Takeuchi 2024-11-12
12119380 Method for making semiconductor device including superlattice with oxygen and carbon monolayers Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha, Robert John Stephenson, Hideki Takeuchi 2024-10-15
12020926 Radio frequency (RF) semiconductor devices including a ground plane layer having a superlattice Hideki Takeuchi 2024-06-25
12014923 Methods for making radio frequency (RF) semiconductor devices including a ground plane layer having a superlattice Hideki Takeuchi 2024-06-18
11978771 Gate-all-around (GAA) device including a superlattice Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha, Robert John Stephenson, Hideki Takeuchi 2024-05-07
11848356 Method for making semiconductor device including superlattice with oxygen and carbon monolayers Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha, Robert John Stephenson, Hideki Takeuchi 2023-12-19
11837634 Semiconductor device including superlattice with oxygen and carbon monolayers Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha, Robert John Stephenson, Hideki Takeuchi 2023-12-05
11742202 Methods for making radio frequency (RF) semiconductor devices including a ground plane layer having a superlattice Hideki Takeuchi 2023-08-29
11664427 Vertical semiconductor device with enhanced contact structure and associated methods Robert John Stephenson, Richard Burton, Dmitri A. Choutov, Nyles Wynn Cody, Daniel J. Connelly +1 more 2023-05-30
11430869 Method for making superlattice structures with reduced defect densities Keith Doran Weeks, Nyles Wynn Cody, Marek Hytha, Robert John Stephenson 2022-08-30
11387325 Vertical semiconductor device with enhanced contact structure and associated methods Robert John Stephenson, Richard Burton, Dmitri A. Choutov, Nyles Wynn Cody, Daniel J. Connelly +1 more 2022-07-12
11183565 Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods Richard Burton, Marek Hytha 2021-11-23
10937888 Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices Richard Burton, Marek Hytha 2021-03-02
10937868 Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices Richard Burton, Marek Hytha 2021-03-02
10879357 Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice Richard Burton, Marek Hytha 2020-12-29
10879356 Method for making a semiconductor device including enhanced contact structures having a superlattice Robert John Stephenson, Richard Burton, Dmitri A. Choutov, Nyles Wynn Cody, Daniel J. Connelly +1 more 2020-12-29
10868120 Method for making a varactor with hyper-abrupt junction region including a superlattice Richard Burton, Marek Hytha 2020-12-15
10854717 Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Richard Burton 2020-12-01
10847618 Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Richard Burton 2020-11-24
10840337 Method for making a FINFET having reduced contact resistance Hideki Takeuchi, Daniel J. Connelly, Marek Hytha, Richard Burton 2020-11-17
10840388 Varactor with hyper-abrupt junction region including a superlattice Richard Burton, Marek Hytha 2020-11-17
10840336 Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods Daniel J. Connelly, Marek Hytha, Hideki Takeuchi, Richard Burton 2020-11-17