Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MH

Marek Hytha — 69 Patents

AIAtomera Incorporated: 45 patents #3 of 20Top 15%
RMRj Mears: 13 patents #3 of 12Top 25%
MTMears Technologies: 10 patents #2 of 14Top 15%
Brookline, MA: #27 of 3,196 inventorsTop 1%
Massachusetts: #589 of 88,656 inventorsTop 1%
Overall (All Time): #29,979 of 4,157,543Top 1%
69 Patents All Time
Marek Hytha has been granted 69 US patents while listed as an inventor at Atomera Incorporated. The first was granted in 2004 and the most recent in November 2025. Marek Hytha ranks #29,979 of 4,157,543 US inventors in our database (top 0.72%). Patent records list Marek Hytha in Brookline, MA, US.

Issued Patents All Time

Showing 1–25 of 69 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12477798 Semiconductor device including a superlattice and enriched silicon 28 epitaxial layer Keith Doran Weeks, Nyles Wynn Cody, Hideki Takeuchi 2025-11-18
12322594 Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer Keith Doran Weeks, Nyles Wynn Cody, Hideki Takeuchi 2025-06-03
12315723 Method for making semiconductor device with selective etching of superlattice to accumulate non-semiconductor atoms Keith Doran Weeks, Nyles Wynn Cody 2025-05-27
12199148 Semiconductor device including superlattice with O18 enriched monolayers Nyles Wynn Cody, Keith Doran Weeks 2025-01-14
12191160 Method for making a semiconductor superlattices with different non-semiconductor thermal stabilities Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears 2025-01-07
12142641 Method for making gate-all-around (GAA) device including a superlattice Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears, Robert John Stephenson, Hideki Takeuchi 2024-11-12 $1,092,000
12119380 Method for making semiconductor device including superlattice with oxygen and carbon monolayers Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears, Robert John Stephenson, Hideki Takeuchi 2024-10-15 $1,714,000
12046470 Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer Keith Doran Weeks, Nyles Wynn Cody, Hideki Takeuchi 2024-07-23 $1,652,000
11978771 Gate-all-around (GAA) device including a superlattice Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears, Robert John Stephenson, Hideki Takeuchi 2024-05-07 $1,915,000
11923418 Semiconductor device including a superlattice and enriched silicon 28 epitaxial layer Keith Doran Weeks, Nyles Wynn Cody, Hideki Takeuchi 2024-03-05 $1,671,000
11848356 Method for making semiconductor device including superlattice with oxygen and carbon monolayers Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears, Robert John Stephenson, Hideki Takeuchi 2023-12-19 $3,614,000
11837634 Semiconductor device including superlattice with oxygen and carbon monolayers Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears, Robert John Stephenson, Hideki Takeuchi 2023-12-05 $3,279,000
11810784 Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer Keith Doran Weeks, Nyles Wynn Cody, Hideki Takeuchi 2023-11-07 $2,410,000
11728385 Semiconductor device including superlattice with O18 enriched monolayers Nyles Wynn Cody, Keith Doran Weeks 2023-08-15 $2,963,000
11721546 Method for making semiconductor device with selective etching of superlattice to accumulate non-semiconductor atoms Keith Doran Weeks, Nyles Wynn Cody 2023-08-08 $3,330,000
11682712 Method for making semiconductor device including superlattice with O18 enriched monolayers Nyles Wynn Cody, Keith Doran Weeks 2023-06-20 $3,522,000
11631584 Method for making semiconductor device with selective etching of superlattice to define etch stop layer Keith Doran Weeks, Nyles Wynn Cody 2023-04-18 $2,144,000
11430869 Method for making superlattice structures with reduced defect densities Keith Doran Weeks, Nyles Wynn Cody, Robert J. Mears, Robert John Stephenson 2022-08-30 $5,183,000
11183565 Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods Richard Burton, Robert J. Mears 2021-11-23 $13,843,000
10937888 Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices Richard Burton, Robert J. Mears 2021-03-02 $6,545,000
10937868 Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices Richard Burton, Robert J. Mears 2021-03-02 $6,545,000
10879357 Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice Richard Burton, Robert J. Mears 2020-12-29 $3,389,000
10868120 Method for making a varactor with hyper-abrupt junction region including a superlattice Richard Burton, Robert J. Mears 2020-12-15 $5,308,000
10854717 Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance Hideki Takeuchi, Daniel J. Connelly, Richard Burton, Robert J. Mears 2020-12-01 $4,043,000
10847618 Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance Hideki Takeuchi, Daniel J. Connelly, Richard Burton, Robert J. Mears 2020-11-24 $3,650,000