Issued Patents All Time
Showing 101–125 of 191 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7609538 | Logic process DRAM | Winston Lee, Sehat Sutardja | 2009-10-27 |
| 7596011 | Logic process DRAM | Winston Lee, Sehat Sutardja | 2009-09-29 |
| 7372736 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2008-05-13 |
| 7369438 | Combo memory design and technology for multiple-function java card, sim-card, bio-passport and bio-id card applications | — | 2008-05-06 |
| 7349257 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2008-03-25 |
| 7339824 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2008-03-04 |
| 7324384 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2008-01-29 |
| 7289366 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2007-10-30 |
| 7283401 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2007-10-16 |
| 7184290 | Logic process DRAM | Winston Lee, Sehat Sutardja | 2007-02-27 |
| 7177190 | Combination nonvolatile integrated memory system using a universal technology most suitable for high-density, high-flexibility and high-security sim-card, smart-card and e-passport applications | — | 2007-02-13 |
| 7164608 | NVRAM memory cell architecture that integrates conventional SRAM and flash cells | — | 2007-01-16 |
| 7154783 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2006-12-26 |
| 7149120 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2006-12-12 |
| 7120064 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2006-10-10 |
| 7110302 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2006-09-19 |
| 7102929 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2006-09-05 |
| 7087953 | Unified non-volatile memory device and method for integrating NOR and NAND-type flash memory and EEPROM device on a single substrate | — | 2006-08-08 |
| 7075826 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2006-07-11 |
| 7064978 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2006-06-20 |
| 6947324 | Logic process DRAM | Winston Lee, Sehat Sutardja | 2005-09-20 |
| 6891221 | Array architecture and process flow of nonvolatile memory devices for mass storage applications | Hung-Sheng Chen, Vei-Han Chan | 2005-05-10 |
| 6862223 | MONOLITHIC, COMBO NONVOLATILE MEMORY ALLOWING BYTE, PAGE AND BLOCK WRITE WITH NO DISTURB AND DIVIDED-WELL IN THE CELL ARRAY USING A UNIFIED CELL STRUCTURE AND TECHNOLOGY WITH A NEW SCHEME OF DECODER AND LAYOUT | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma, Koucheng Wu | 2005-03-01 |
| 6850438 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Fu-Chang Hsu, Hsing-Ya Tsao, Han-Rei Ma | 2005-02-01 |
| 6839278 | Highly-integrated flash memory and mask ROM array architecture | Fu-Chang Hsu | 2005-01-04 |