Issued Patents All Time
Showing 25 most recent of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11196587 | Permutated ring network | Kit S. Tam | 2021-12-07 |
| 10896900 | Methods and systems for packaging an integrated circuit | Runzi Chang | 2021-01-19 |
| 10884451 | System and methods for completing a cascaded clock ring bus | — | 2021-01-05 |
| 10854455 | Methods and apparatus for fabricating IC chips with tilted patterning | Runzi Chang | 2020-12-01 |
| 10707411 | MRAM structure for efficient manufacturability | Zining Wu, Runzi Chang | 2020-07-07 |
| 10600793 | Fabricating memory devices with optimized gate oxide thickness | Runzi Chang, Peter Wung Lee | 2020-03-24 |
| 10476656 | System and method for asynchronous, multiple clock domain data streams coalescing and resynchronization | Kit S. Tam | 2019-11-12 |
| 10431574 | Methods and systems for packaging semiconductor devices to improve yield | Runzi Chang | 2019-10-01 |
| 10319727 | Fabricating memory devices with optimized gate oxide thickness | Runzi Chang, Peter Wung Lee | 2019-06-11 |
| 10056363 | Methods and systems to improve yield in multiple chips integration processes | Runzi Chang | 2018-08-21 |
| 10037400 | Integrated circuit manufacturing process for aligning threshold voltages of transistors | Runzi Chang, Peter Wung Lee | 2018-07-31 |
| 10007521 | Banked physical register data flow architecture in out-of-order processors | Kit S. Tam | 2018-06-26 |
| 9830976 | Systems and methods for a high performance memory cell structure | Peter Wung Lee | 2017-11-28 |
| 9652246 | Banked physical register data flow architecture in out-of-order processors | Kit S. Tam | 2017-05-16 |
| 9570118 | Circuits, architectures, apparatuses, systems, algorithms, and methods for memory with multiple power supplies and/or multiple low power modes | Ha Soo Kim | 2017-02-14 |
| 9558811 | Disturb-proof static RAM cells | Donald Lee, Peter Wung Lee | 2017-01-31 |
| 9490427 | Resistive random access memory cell structure | Pantas Sutardja, Albert Wu, Peter Wung Lee, Runzi Chang | 2016-11-08 |
| 9424911 | Method and apparatus for screening memory cells for disturb failures | Moon-Hae Son, Peter Wung Lee | 2016-08-23 |
| 9324417 | Systems and methods for avoiding read disturbance in a static random-access memory (SRAM) | Peter Wung Lee | 2016-04-26 |
| 9275731 | Systems and methods for increasing the read sensitivity of a resistive random access memory (RRAM) | Pantas Sutardja, Albert Wu, Runzi Chang, Peter Wung Lee | 2016-03-01 |
| 9250992 | Test data reporting during memory testing | Kit S. Tam, Robert Bateman, Kresten V. McGrath, David Lippincott | 2016-02-02 |
| 9245961 | Reducing source contact to gate spacing to decrease transistor pitch | Albert Wu, Pantas Sutardja, Peter Wung Lee, Chien-Chuan Wei, Runzi Chang | 2016-01-26 |
| 9223920 | Method and apparatus for timing closure | Jason Su | 2015-12-29 |
| 9218856 | Circuits, architectures, apparatuses, systems, algorithms, and methods for memory with multiple power supplies and/or multiple low power modes | Ha Soo Kim | 2015-12-22 |
| 9214230 | Resistive random access memory cell structure with reduced programming voltage | Pantas Sutardja, Albert Wu, Peter Wung Lee, Runzi Chang | 2015-12-15 |