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Fu-Chang Hsu — 131 Patents

ATAplus Flash Technology: 79 patents #2 of 13Top 20%

NSNeo Semiconductor: 22 patents #1 of 1Top 100%

ACAplus Integrated Circuits: 15 patents #2 of 3Top 70%

San Jose, CA: #144 of 32,062 inventorsTop 1%

California: #1,332 of 386,348 inventorsTop 1%

Overall (All Time): #8,311 of 4,157,543Top 1%

131 Patents All Time

Fu-Chang Hsu has been granted 131 US patents while listed as an inventor at Aplus Flash Technology. The first was granted in 1997 and the most recent in February 2025. Fu-Chang Hsu ranks #8,311 of 4,157,543 US inventors in our database (top 0.20%). Patent records list Fu-Chang Hsu in San Jose, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 131 patents

Patent #	Title	Co-Inventors	Date
12217808	Methods and apparatus for NAND flash memory	—	2025-02-04
12165717	Methods and apparatus for a novel memory array	—	2024-12-10
12142329	Methods and apparatus for NAND flash memory	—	2024-11-12
12100460	Methods and apparatus for NAND flash memory	—	2024-09-24
12029140	Quantum bit array	Kevin Hsu	2024-07-02
12002525	Methods and apparatus for NAND flash memory	—	2024-06-04
11972811	Methods and apparatus for NAND flash memory	—	2024-04-30
11723288	Quantum bit array	Kevin Hsu	2023-08-08
11522016	3D vertical memory array cell structures with individual selectors and processes	—	2022-12-06
11232835	Methods and apparatus for reading NAND flash memory	—	2022-01-25
11205116	Three-dimensional neural network array	Kevin Hsu	2021-12-21
11182664	Configurable three-dimensional neural network array	Kevin Hsu	2021-11-23
11056190	Methods and apparatus for NAND flash memory	—	2021-07-06
11049579	Methods and apparatus for NAND flash memory	—	2021-06-29
10840300	3D vertical memory array cell structures with individual selectors and processes	—	2020-11-17
10840301	3D vertical memory array cell structures with individual selectors and processes	—	2020-11-17
10734088	CMOS anti-fuse cell	—	2020-08-04
10720215	Methods and apparatus for writing nonvolatile 3D NAND flash memory using multiple-page programming	—	2020-07-21
10553293	3D NAND array with divided string architecture	—	2020-02-04
10483324	3D vertical memory array cell structures and processes	—	2019-11-19
10395744	CMOS anti-fuse cell	—	2019-08-27
10242743	Method and apparatus for writing nonvolatile memory using multiple-page programming	—	2019-03-26
10199104	Method and apparatus for providing multi-page read and write using SRAM and nonvolatile memory devices	—	2019-02-05
10163916	Compact anti-fuse memory cell using CMOS process	—	2018-12-25
10163509	Method and apparatus for storing information using a memory able to perform both NVM and DRAM functions	—	2018-12-25