Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6818491 | Set of three level concurrent word line bias conditions for a NOR type flash memory array | Peter Wung Lee, Hsing-Ya Tsao, Fu-Chang Hsu | 2004-11-16 |
| 6777292 | Set of three level concurrent word line bias conditions for a NOR type flash memory array | Peter Wung Lee, Hsing-Ya Tsao, Fu-Chang Hsu | 2004-08-17 |
| 6620682 | Set of three level concurrent word line bias conditions for a nor type flash memory array | Peter Wung Lee, Hsing-Ya Tsao, Fu-Chang Hsu | 2003-09-16 |
| 6556481 | 3-step write operation nonvolatile semiconductor one-transistor, nor-type flash EEPROM memory cell | Fu-Chang Hsu, Hsing-Ya Tsao, Peter Wung Lee | 2003-04-29 |