Issued Patents All Time
Showing 25 most recent of 80 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9177644 | Low-voltage fast-write PMOS NVSRAM cell | Peter Wung Lee | 2015-11-03 |
| 9177645 | 10T NVSRAM cell and cell operations | Peter Wung Lee | 2015-11-03 |
| 9177658 | 1T1b and 2T2b flash-based, data-oriented EEPROM design | Peter Wung Lee | 2015-11-03 |
| 9171627 | Non-boosting program inhibit scheme in NAND design | Peter Wung Lee | 2015-10-27 |
| 9019764 | Low-voltage page buffer to be used in NVM design | Peter Wung Lee | 2015-04-28 |
| 9001583 | On-chip HV and LV capacitors acting as the second back-up supplies for NVSRAM auto-store operation | Peter Wung Lee | 2015-04-07 |
| 8929136 | 8T NVSRAM cell and cell operations | Peter Wung Lee | 2015-01-06 |
| 8923049 | 1T1b and 2T2b flash-based, data-oriented EEPROM design | Peter Wung Lee | 2014-12-30 |
| 8634241 | Universal timing waveforms sets to improve random access read and write speed of memories | Peter Wung Lee, Fu-Chang Hsu | 2014-01-21 |
| 8345481 | NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory array | Peter Wung Lee, Fu-Chang Hsu | 2013-01-01 |
| 8295087 | Row-decoder and select gate decoder structures suitable for flashed-based EEPROM operating below +/− 10v BVDS | Peter Wung Lee, Fu-Chang Hsu | 2012-10-23 |
| 8289775 | Apparatus and method for inhibiting excess leakage current in unselected nonvolatile memory cells in an array | Peter Wung Lee, Fu-Chang Hsu | 2012-10-16 |
| 8274829 | Row-decoder and source-decoder structures suitable for erase in unit of page, sector and chip of a NOR-type flash operating below +/− 10V BVDS | Peter Wung Lee, Fu-Chang Hsu | 2012-09-25 |
| 8237212 | Nonvolatile memory with a unified cell structure | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma, Koucheng Wu | 2012-08-07 |
| 8072811 | NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory array | Peter Wung Lee, Fu-Chang Hsu | 2011-12-06 |
| 7915092 | Nonvolatile memory with a unified cell structure | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma, Koucheng Wu | 2011-03-29 |
| 7636252 | Nonvolatile memory with a unified cell structure | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma, Koucheng Wu | 2009-12-22 |
| 7372736 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2008-05-13 |
| 7349257 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2008-03-25 |
| 7339824 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2008-03-04 |
| 7324384 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma, Koucheng Wu | 2008-01-29 |
| 7289366 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2007-10-30 |
| 7283401 | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2007-10-16 |
| 7154783 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2006-12-26 |
| 7149120 | Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operations | Peter Wung Lee, Fu-Chang Hsu, Han-Rei Ma | 2006-12-12 |