Issued Patents All Time
Showing 51–75 of 81 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5210841 | External memory accessing system | — | 1993-05-11 |
| 5188465 | RMS power controller for dot-matrix printers | George Keith Parish | 1993-02-23 |
| 5185878 | Programmable cache memory as well as system incorporating same and method of operating programmable cache memory | Gigy Baror | 1993-02-09 |
| 5166745 | Rapid re-targeting, space-based, boresight alignment system and method for neutral particle beams | — | 1992-11-24 |
| 5146570 | System executing branch-with-execute instruction resulting in next successive instruction being execute while specified target instruction is prefetched for following execution | Phillip D. Hester | 1992-09-08 |
| RE34052 | Data processing system with CPU register to register data transfers overlapped with data transfer to and from main storage | Phillip D. Hester | 1992-09-01 |
| 5142672 | Data transfer controller incorporating direct memory access channels and address mapped input/output windows | Timothy A. Olson, Drew J. Dutton, Sherman Lee, David W. Stoenner | 1992-08-25 |
| 5136697 | System for reducing delay for execution subsequent to correctly predicted branch instruction using fetch information stored with each block of instructions in cache | — | 1992-08-04 |
| 5129067 | Multiple instruction decoder for minimizing register port requirements | — | 1992-07-07 |
| 5008796 | Apparatus and method for improving load regulation in switching power supplies | — | 1991-04-16 |
| 4947366 | Input/output controller incorporating address mapped input/output windows and read ahead/write behind capabilities | — | 1990-08-07 |
| 4926323 | Streamlined instruction processor | Gigy Baror, Brian W. Case, Rod G. Fleck, Philip M. Freidin, Smeeta Gupta +4 more | 1990-05-15 |
| 4878166 | Direct memory access apparatus and methods for transferring data between buses having different performance characteristics | Timothy A. Olson, Drew J. Dutton, Sherman Lee, David W. Stoenner | 1989-10-31 |
| 4878168 | Bidirectional serial test bus device adapted for control processing unit using parallel information transfer bus | Charles Wright | 1989-10-31 |
| 4851990 | High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure | Gigy Baror | 1989-07-25 |
| 4811345 | Methods and apparatus for providing a user oriented microprocessor test interface for a complex, single chip, general purpose central processing unit | — | 1989-03-07 |
| 4811206 | Data processing system with overlapped address translation and address computation | — | 1989-03-07 |
| 4803615 | Microcode control of a parallel architecture microprocessor | — | 1989-02-07 |
| 4788683 | Data processing system emulation with microprocessor in place | Phillip D. Hester | 1988-11-29 |
| 4776691 | Combination laser designator and boresighter system for a high-energy laser | Lewis Andrews, Edward Bernardon | 1988-10-11 |
| 4777588 | General-purpose register file optimized for intraprocedural register allocation, procedure calls, and multitasking performance | Brian W. Case, Rod G. Fleck, Cheng-Gang Kong, Ole H. Moller | 1988-10-11 |
| 4775927 | Processor including fetch operation for branch instruction with control tag | Phillip D. Hester | 1988-10-04 |
| 4774473 | Limited diffraction feedback laser system having a cavity turbulence monitor | Lewis Andrews, Edward Bernardon | 1988-09-27 |
| 4773078 | Limited diffraction feedback laser system having a controlled distortion cavity-feedback mirror | — | 1988-09-20 |
| 4767209 | Limited diffraction feedback laser system having a composite sensor | — | 1988-08-30 |