| 9652233 |
Hint values for use with an operand cache |
Terence M. Potter, James S. Blomgren, Andrew M. Havlir, Michael A. Geary |
2017-05-16 |
| 9600288 |
Result bypass cache |
Terence M. Potter, James S. Blomgren, Robert A. Drebin, Douglas C. Youngwith, Jon A. Loschke |
2017-03-21 |
| 9459869 |
Intelligent caching for an operand cache |
Terence M. Potter, James S. Blomgren, Andrew M. Havlir |
2016-10-04 |
| 9378146 |
Operand cache design |
James S. Blomgren, Terence M. Potter, Andrew M. Havlir |
2016-06-28 |
| 7975133 |
Method for repairing a speculative global history record |
Terrence Matthew Potter, Jon A. Loschke |
2011-07-05 |
| 7904705 |
System and method for repairing a speculative global history record |
Terrence Matthew Potter, Jon A. Loschke |
2011-03-08 |
| 7844806 |
Global history branch prediction updating responsive to taken branches |
Jon A. Loschke, Terrence Matthew Potter |
2010-11-30 |
| 7707398 |
System and method for speculative global history prediction updating |
Terrence Matthew Potter, Jon A. Loschke |
2010-04-27 |
| 7219326 |
Physical realization of dynamic logic using parameterized tile partitioning |
Jeffrey B. Reed, James S. Blomgren, Donald W. Glowka, Thomas W. Rudwick, III |
2007-05-15 |
| 6898691 |
Rearranging data between vector and matrix forms in a SIMD matrix processor |
James S. Blomgren, Christophe Harle |
2005-05-24 |
| 6622240 |
Method and apparatus for pre-branch instruction |
James S. Blomgren |
2003-09-16 |
| 5317715 |
Reduced instruction set computer system including apparatus and method for coupling a high performance RISC interface to a peripheral bus having different performance characteristics |
William M. Johnson, Drew J. Dutton, Sherman Lee, David W. Stoenner |
1994-05-31 |
| 5142672 |
Data transfer controller incorporating direct memory access channels and address mapped input/output windows |
William M. Johnson, Drew J. Dutton, Sherman Lee, David W. Stoenner |
1992-08-25 |
| 4926323 |
Streamlined instruction processor |
Gigy Baror, Brian W. Case, Rod G. Fleck, Philip M. Freidin, Smeeta Gupta +4 more |
1990-05-15 |
| 4878166 |
Direct memory access apparatus and methods for transferring data between buses having different performance characteristics |
William M. Johnson, Drew J. Dutton, Sherman Lee, David W. Stoenner |
1989-10-31 |
