SM

Stephan G. Meier

AM AMD: 22 patents #477 of 9,279Top 6%
Apple: 19 patents #1,704 of 18,612Top 10%
Ericsson: 5 patents #2,311 of 9,909Top 25%
SS Sap Se: 5 patents #668 of 6,322Top 15%
AK Aco Sevrin Ahlmann Gmbh & Co Kg: 3 patents #10 of 41Top 25%
Globalfoundries: 1 patents #2,221 of 4,424Top 55%
RN Redback Networks: 1 patents #49 of 75Top 70%
AK Aco Ahlmann Se & Co. Kg: 1 patents #5 of 16Top 35%
Overall (All Time): #41,478 of 4,157,543Top 1%
58
Patents All Time

Issued Patents All Time

Showing 25 most recent of 58 patents

Patent #TitleCo-InventorsDate
12392123 Channel-retaining device, drainage system and method Arne Meincke, Marco Wandkowski 2025-08-19
11921640 Mitigating retention of previously-critical cache lines Tyler J. Huberty, Vivek Venkatraman, Sandeep Gupta, Eric J. Furbish, Srinivasa Rangan Sridharan 2024-03-05
11822480 Criticality-informed caching policies Tyler J. Huberty, Vivek Venkatraman, Sandeep Gupta, Eric J. Furbish, Srinivasa Rangan Sridharan 2023-11-21
11307561 Manufacturing process data collection and analytics Edgar Wolf, Robert Noce 2022-04-19
11248643 Composite element for building construction and civil engineering, and use of a fastening element designed as a clamping element Christian Philip Schumann-Hammermann 2022-02-15
11176045 Secondary prefetch circuit that reports coverage to a primary prefetch circuit to limit prefetching by primary prefetch circuit Tyler J. Huberty, Nikhil Gupta 2021-11-16
10901394 Manufacturing process data collection and analytics Philipp Raub, Robert Noce, Matthias Weigold, Navdeep Raj Ganesh, Sarah Fathallah +1 more 2021-01-26
10776521 Security techniques based on memory timing characteristics Jeremie S. Kim, Minesh H. Patel, Tyler J. Huberty, Onur Mutlu 2020-09-15
10678216 Manufacturing process data collection and analytics Edgar Wolf, Robert Noce 2020-06-09
10621100 Unified prefetch circuit for multi-level caches Tyler J. Huberty, Gerard R. Williams, III, Pradeep Kanapathipillai 2020-04-14
10558197 Manufacturing process data collection and analytics Robert Noce, Navdeep Raj Ganesh, Ge Cao, Matthias Weigold, Philipp Raub 2020-02-11
10519645 End wall for a gutter for surface drainage Hans-Julius Ahlmann 2019-12-31
10450707 Gutter Bengt Jesse-Windelband 2019-10-22
10437595 Load/store dependency predictor optimization for replayed loads Pradeep Kanapathipillai, Gerard R. Williams, III, Mridul Agarwal, Kulin N. Kothari 2019-10-08
10402334 Prefetch circuit for a processor with pointer optimization Mridul Agarwal 2019-09-03
10353379 Manufacturing process data collection and analytics Philipp Raub, Robert Noce, Matthias Weigold, Navdeep Raj Ganesh, Ge Cao 2019-07-16
10331567 Prefetch circuit with global quality factor to reduce aggressiveness in low power modes Tyler J. Huberty, Nikhil Gupta, Francesco Spadini, Gideon N. Levinsky 2019-06-25
10180905 Unified prefetch circuit for multi-level caches Tyler J. Huberty, Gerard R. Williams, III, Pradeep Kanapathipillai 2019-01-15
9971694 Prefetch circuit for a processor with pointer optimization Mridul Agarwal 2018-05-15
9904624 Prefetch throttling in a multi-core system Tyler J. Huberty, Khubaib Khubaib 2018-02-27
9886385 Content-directed prefetch circuit with quality filtering Tyler J. Huberty, Mridul Agarwal 2018-02-06
9745733 Drainage channel with a drainage body and a cover Hans-Julius Ahlmann, Jan Mieze, James Canney 2017-08-29
9710268 Reducing latency for pointer chasing loads Pradeep Kanapathipillai, Sandeep Gupta 2017-07-18
9600289 Load-store dependency predictor PC hashing John H. Mylius, Gerard R. Williams, III, Suparn Vats 2017-03-21
9582276 Processor and method for implementing barrier operation using speculative and architectural color values Gerard R. Williams, III 2017-02-28