Issued Patents All Time
Showing 26–50 of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8633083 | Apparatus and method for a metal oxide semiconductor field effect transistor with source side punch-through protection implant | Imran Khan, Dong-Hyuk Ju | 2014-01-21 |
| 8530977 | Apparatus and method for a metal oxide semiconductor field effect transistor with source side punch-through protection implant | Imran Khan, Dong-Hyuk Ju | 2013-09-10 |
| 8520437 | High read speed memory with gate isolation | Hagop Nazarian, Lei Xue | 2013-08-27 |
| 8279674 | High read speed memory with gate isolation | Hagop Nazarian, Lei Xue | 2012-10-02 |
| 8237210 | Array type CAM cell for simplifying processes | Zhigang Wang, Kazuhiro Mizutani | 2012-08-07 |
| 8134853 | High read speed electronic memory with serial array transistors | Hagop Nazarian | 2012-03-13 |
| 7910976 | High density NOR flash array architecture | — | 2011-03-22 |
| 7414281 | Flash memory with high-K dielectric material between substrate and gate | Yue-Song He, Zhigang Wang | 2008-08-19 |
| 7301193 | Structure and method for low Vss resistance and reduced DIBL in a floating gate memory cell | Shenqing Fang, Timothy Thurgate, Kuo-Tung Chang, Angela T. Hui, Kazuhiro Mizutani +4 more | 2007-11-27 |
| 7288809 | Flash memory with buried bit lines | Chi Chang, Sheung-Hee Park | 2007-10-30 |
| 7283398 | Method for minimizing false detection of states in flash memory devices | Yue-Song He, Takao Akaogi, Wing Leung, Zhigang Wang | 2007-10-16 |
| 7272060 | Method, system, and circuit for performing a memory related operation | Qiang Lu, Zhigang Wang | 2007-09-18 |
| 7217964 | Method and apparatus for coupling to a source line in a memory device | Kuo-Tung Chang | 2007-05-15 |
| 7187591 | Memory device and method for erasing memory | Krishna K. Parat, Johnny Javanifard | 2007-03-06 |
| 7142455 | Positive gate stress during erase to improve retention in multi-level, non-volatile flash memory | Sung-chul Lee, Sheung-Hee Park | 2006-11-28 |
| 7073104 | Method and system for applying testing voltage signal | Jiang Li, Steve Tam | 2006-07-04 |
| 7020021 | Ramped soft programming for control of erase voltage distributions in flash memory devices | Wing Leung, Yue-Song He, Sheung-Hee Park | 2006-03-28 |
| 7009271 | Memory device with an alternating Vss interconnection | Timothy Thurgate | 2006-03-07 |
| 6998677 | Semiconductor component and method of manufacture | — | 2006-02-14 |
| 6996004 | Minimization of FG-FG coupling in flash memory | Sheunghee Park | 2006-02-07 |
| 6963106 | Memory array with memory cells having reduced short channel effects | Yue-Song He, Kazuhiro Mizutani, Timothy Thurgate | 2005-11-08 |
| 6961267 | Method and device for programming cells in a memory array in a narrow distribution | Lee Cleveland, Chi Chang | 2005-11-01 |
| 6953752 | Reduced silicon gouging and common source line resistance in semiconductor devices | Yue-Song He, Sameer Haddad, Zhi-Gang Wang | 2005-10-11 |
| 6950344 | Reading flash memory | Xin Guo, Sheung-Hee Park | 2005-09-27 |
| 6939766 | Method for fabricating a flash memory device | Yue-Song He, Jianshi Wang | 2005-09-06 |