RR

Rajat Rakkhit

AM AMD: 7 patents #1,662 of 9,279Top 20%
Lsi Logic: 3 patents #574 of 1,957Top 30%
Overall (All Time): #525,158 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6486056 Process for making integrated circuit structure with thin dielectric between at least local interconnect level and first metal interconnect level Nicholas F. Pasch 2002-11-26
6329720 Tungsten local interconnect for silicon integrated circuit structures, and method of making same Weidan Li, Wen-Chin Yeh 2001-12-11
6239491 Integrated circuit structure with thin dielectric between at least local interconnect level and first metal interconnect level, and process for making same Nicholas F. Pasch 2001-05-29
5920104 Reducing reverse short-channel effect with light dose of P with high dose of as in n-channel LDD Deepak Nayak, Felicia Heiler 1999-07-06
5817536 Method to optimize p-channel CMOS ICs using Q.sub.bd as a monitor of boron penetration Deepak Nayak, Ming-Yin Hao 1998-10-06
5786254 Hot-carrier reliability in submicron MOS devices by oxynitridation Ming-Yin Hao 1998-07-28
5757204 "Method and circuit for detecting boron (""B"") in a semiconductor device using threshold voltage (""V"") fluence test" Deepak Nayak, Ming-Yin Hao 1998-05-26
5674781 Landing pad technology doubled up as a local interconnect and borderless contact for deep sub-half micrometer IC application Richard J. Huang, Robin Cheung, Raymond T. Lee 1997-10-07
5654589 Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application Richard J. Huang, Robin Cheung, Raymond T. Lee 1997-08-05
5215937 Optimizing doping control in short channel MOS Darrell M. Erb, Farrokh Omid-Zohoor 1993-06-01